Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 108

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 54. IRQ2 Enable High Bit Register (IRQ2ENH)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
IRQ2 Enable High and Low Bit Registers
PWMTENH
R/W
7
0
The IRQ2 enable high and low bit registers (see
encoded enabling for interrupts in the interrupt request 2 register. Priority is generated by
setting bits in each register.
Table 53. IRQ2 Enable and Priority Encoding
PWMTENH—PWM Timer Interrupt Request Enable High Bit
U1RENH—UART 1 Receive Interrupt Request Enable High Bit
U1TENH—UART 1 Transmit Interrupt Request Enable High Bit
PWMFENH— PWM Fault Interrupt Request Enable High Bit
CxENH/DMAxENH—Port Cx or DMAx Interrupt Request Enable High Bit
IRQ2ENH[x]
0
0
1
1
Note: x indicates the register bits from 0 through 7.
U1RENH
R/W
6
0
U1TENH
IRQ2ENL[x]
R/W
5
0
0
1
0
1
P R E L I M I N A R Y
Table 53
PWMFENH
R/W
4
0
Priority
Disabled
Level 1
Level 2
Level 3
FF_E03AH
describes the priority control for IRQ2.
DMA3ENH
C3ENH/
R/W
3
0
Table 54
Description
Disabled
Low
Nominal
High
DMA2ENH
C2ENH/
R/W
and
2
0
Table
Product Specification
ZNEO
DMA1ENH
C1ENH/
55) form a priority
R/W
Interrupt Controller
1
0
Z16F Series
DMA0ENH
C0ENH/
R/W
0
0
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