Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 330

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

PS022008-0810
Table 166. On-Chip Debugger Commands (Continued)
Debug Command
Read Memory (short -address is sign
extended)
Write Memory (short -address is sign
extended)
Read Memory (long)
Write Memory (long)
Read Memory CRC
Read Each Memory CRC
Note: Unlisted command byte values are reserved.
Cyclic Redundancy Check
Memory Cyclic Redundancy Check
UART Mode
To ensure transmitted and received data is free of errors, the OCD transmits an 8-bit cyclic
redundancy check (CRC) at the end of each command. The CRC is enabled after the OCD
is initialized, it is not sent with the first read revision command. This CRC is
disabled by clearing the CRCEN bit of the DBGCTL register.
The CRC is reset at the beginning of each command and is computed on the data received
from and sent to the host. The CRC is calculated using the ATM-8 HEC polynomial
x
first. The resulting CRC is reversed and inverted. The check value is
The read memory CRC command computes the CRC on memory in 4K blocks, up to 4K
blocks at a time (16M of data). The Memory CRC is computed using the 16-bit CCITT
polynomial
polynomial LSB first. The resulting CRC is reversed and inverted. The check value is
F0B8h
When the OCD is disabled, the DBG pin is used as a single pin half-duplex UART. When
the serial interface is in UART mode, data received on the single wire bus is written to the
Receive Data register. Data written to the Transmit Data register is transmitted on the sin-
gle wire bus. In UART mode, the auto-baud hardware is used to configure the BRG, or the
baud rate registers are written to set a specific baud rate.
8
+x
2
+x
.
1
+x
x
0
16
. The CRC is preset to all ones. Data is shifted through the polynomial LSB
+x
12
+x
5
+x
P R E L I M I N A R Y
0
. The CRC is preset to all ones. Data is shifted through the
1110-BlockCount[3:0]
1111-BlockCount[3:0]
0100-(regno[3:0])
0100-(regno[3:0])
Command Byte
1010-size[3:0]
1011-size[3:0]
Read only unprotected memory
Read only unprotected memory
Write only unprotected memory
Write only unprotected memory
Disabled by Read Protect
Product Specification
ZNEO
Option Bit
locations
locations
locations
locations
CFh
On-Chip Debugger
—
—
.
Z16F Series
314