Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 18
![DEV KIT FOR Z16F ZNEO](/photos/9/22/92258/z16f2800100zcog_sml.jpg)
Z16F2800100ZCOG
Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr
Datasheets
1.Z16F2800100ZCOG.pdf
(2 pages)
2.Z16F2800100ZCOG.pdf
(30 pages)
3.Z16F2800100ZCOG.pdf
(388 pages)
Specifications of Z16F2800100ZCOG
Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
- Current page: 18 of 388
- Download datasheet (22Mb)
ZNEO CPU Features
PS022008-0810
External Interface
Flash Controller
Random Access Memory
Zilog’s ZNEO
microcontrollers. The ZNEO CPU features are as follows:
•
•
•
•
•
•
For more information on ZNEO CPU, refer to ZNEO CPU User Manual (UM0188)
available for download at www.zilog.com.
The external interface allows seamless connection to external memory and peripherals.
A 24-bit address bus and a selectable 8-bit or 16-bit data bus allows parallel access up to
16 MB. The programmable nature of the external interface supports connection to various
bus styles. More GPIO pins are utilized by controlling address and control signals bitwise.
The ZNEO products contain 128 KB of internal Flash memory. The Flash controller
programs and erases the Flash memory. ZNEO CPU accesses 16-bits at a time of internal
Flash memory to improve the processor throughput. A sector protection scheme allows
flexible protection of user code.
An internal RAM of 4 KB provides storage space for data, variables, and stack operations.
Like Flash memory, ZNEO CPU accesses 16-bits at a time of internal RAM to improve
the processor performance.
16 MB of Program memory address space for object code and data with 8-bit or 16-bit
data paths.
8-bit, 16-bit, and 32-bit ALU operations.
24-bit stack with overflow protection.
Direct register-to-register architecture allows each memory address to function as an
accumulator. This improves execution time and decreases the required program
memory.
New instructions improve execution efficiency for code developed using higher-level
programming languages including ‘C’.
Pipelined instructions: Fetch, Decode, and Execute.
®
CPU meets the continuing demand for faster and more code-efficient
P R E L I M I N A R Y
Product Specification
ZNEO
Z16F Series
Introduction
3
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