Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 219

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
I
PS022008-0810
2
C Master/Slave Controller
The I
I
signal bidirectional lines. Features of the I
2
C protocol. The I
Baud Rate Generator (BRG) is used as a general purpose timer with interrupt if the I
controller is disabled.
Operates in MASTER/SLAVE or SLAVE ONLY modes.
Supports arbitration in a Multi-Master environment (MASTER/SLAVE mode).
Supports data rates up to 400 kbps.
7-bit or 10-bit Slave address recognition (interrupt only on address match).
Optional general call address recognition.
Optional digital filter on receive SDA and SCL lines.
Optional interactive receive mode allows software interpretation of each received
address and/or data byte before acknowledging.
Unrestricted number of data bytes per transfer.
2
C Master/Slave Controller makes the ZNEO
2
C bus consists of the serial data signal (SDA) and a serial clock (SCL)
P R E L I M I N A R Y
2
C Controller include:
®
Z16F Series bus compatible with the
I
2
C Master/Slave Controller
Product Specification
ZNEO
Z16F Series
2
C 
203

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