Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 190
![DEV KIT FOR Z16F ZNEO](/photos/9/22/92258/z16f2800100zcog_sml.jpg)
Z16F2800100ZCOG
Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr
Datasheets
1.Z16F2800100ZCOG.pdf
(2 pages)
2.Z16F2800100ZCOG.pdf
(30 pages)
3.Z16F2800100ZCOG.pdf
(388 pages)
Specifications of Z16F2800100ZCOG
Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
- Current page: 190 of 388
- Download datasheet (22Mb)
Infrared Encoder/Decoder Control Register Definitions
PS022008-0810
Caution:
this process is repeated. If the incoming data is a logical 1 (no pulse), the Endec returns to
the initial state and waits for the next falling edge. As each falling edge is detected, the
Endec clock counter is reset, resynchronizing the Endec to the incoming signal. This
allows the Endec to tolerate jitter and baud rate errors in the incoming data stream.
Resynchronizing the Endec does not alter the operation of the UART, which ultimately
receives the data. The UART is only synchronized to the incoming data stream when a
Start bit is received.
All Infrared Endec configuration and status information is set by the UART control
registers as defined in the beginning in
on page 152.
To prevent spurious signals during IrDA data transmission, set the IREN bit in the UARTx
Control 1 register to 1 to enable the Infrared Encoder/Decoder before enabling the GPIO
port alternate function for the corresponding pin.
P R E L I M I N A R Y
LIN-UART Control Register Definitions
Infrared Encoder/Decoder
Product Specification
ZNEO
Z16F Series
174
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