Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 38

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Bus Widths
PS022008-0810
000080H
000082H
000080H
Figure 8. Alignment of Word and Quad Operations on 16-bit Memories
The ZNEO CPU accesses 8-bit or 16-bit memories. The data buses of the internal 
non-volatile memory and internal RAM are 16-bit wide. The internal peripherals are a mix
of 8-bit and 16-bit peripherals. The external memory bus is configured as an 8-bit or 16-bit
memory bus.
If a Word or Quad operation occurs on a 16-bit wide memory, the number of memory
accesses depends on the alignment of the address. If the address is aligned on an even
boundary, a Word operation takes one memory access and a Quad operation takes two
memory accesses. If the address is on an odd boundary (unaligned), a Word operation
takes two memory accesses and a Quad operation takes three memory accesses.
Figure 8
Aligned Word Access
Aligned Quad Access
displays the alignment Word and Quad operations on 16-bit memories.
MSB
MSB
LSB
LSB
000081H
000083H
000081H
P R E L I M I N A R Y
000082H
000080H
000084H
000082H
000080H
Unaligned Word Access
Unaligned Quad Access
LSB
LSB
MSB
MSB
Product Specification
000083H
000081H
000085H
000083H
000081H
ZNEO
Address Space
Z16F Series
23