Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 189

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

PS022008-0810
Baud Rate
IR_RXD
UART’s
Clock
RXD
Caution:
Receiving IrDA Data
8-clock
delay
Start Bit = 0
Data received from the infrared transceiver via the IR_RXD signal through the RXD pin is
decoded by the Infrared Endec and passed to the UART. The UART’s baud rate clock is
used by the Infrared Endec to generate the demodulated signal (RXD) that drives the
UART. Each UART/Infrared data bit is 16-clocks wide.
When the Infrared Endec is enabled, the UART’s RXD signal is internal to the ZNEO
Z16F Series products when the IR_RXD signal is received through the RXD pin.
The system clock frequency must be at least 1.0 MHz to ensure proper reception of
the 1.6
Endec Receiver Synchronization
The IrDA receiver uses a local baud rate clock counter (0 to 15 clock periods) to generate
an input stream for the UART and to create a sampling window for detection of incoming
pulses. The generated UART input (UART RXD) is delayed by 8 baud rate clock periods
with respect to the incoming IrDA data stream. When a falling edge in the input data
stream is detected, the Endec counter is reset. When the count reaches a value of 8, the
UART RXD value is updated to reflect the value of the decoded data.
When the count reaches 12 baud clock periods, the sampling window for the next
incoming pulse opens. The window remains open until the count again reaches 8 (or in
other words 24 baud clock periods since the previous pulse was detected). This gives the
Endec a sampling window of minus 4 baudrate clocks to plus 8 baudrate clocks around the
expected time of an incoming pulse. If an incoming pulse is detected inside this window,
16-clock
min. 1.6  s
period
pulse

Start Bit = 0
s minimum width pulses allowed by the IrDA standard.
16-clock
period
Data Bit 0 = 1
Data Bit 0 = 1
Figure 33. Infrared Data Reception
P R E L I M I N A R Y
16-clock
period
Data Bit 1 = 0
Data Bit 1 = 0
16-clock
period
Data Bit 2 = 1
Figure 33
Data Bit 2 = 1
16-clock
period
Infrared Encoder/Decoder
Product Specification
displays data reception.
ZNEO
Data Bit 3 = 1
Z16F Series
Data Bit 3 =
173