C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 190

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

C8051F040/1/2/3/4/5/6/7
190
Bits7-6:
Bit5:
Bit4:
Bits3-2:
Bits1-0:
R/W
Bit7
-
Unused. Read = 00b. Write = don’t care.
PRTSEL: EMIF Port Select.
0: EMIF active on P0-P3.
1: EMIF active on P4-P7.
EMD2: EMIF Multiplex Mode Select.
0: EMIF operates in multiplexed address/data mode.
1: EMIF operates in non-multiplexed mode (separate address and data pins).
EMD1-0: EMIF Operating Mode Select.
These bits control the operating mode of the External Memory Interface.
00: Internal Only: MOVX accesses on-chip XRAM only. All effective addresses alias to on-
01: Split Mode without Bank Select: Accesses below the 4k boundary are directed on-chip.
10: Split Mode with Bank Select: Accesses below the 4k boundary are directed on-chip.
11: External Only: MOVX accesses off-chip XRAM only. On-chip XRAM is not visible to the
EALE1-0: ALE Pulse-Width Select Bits (only has effect when EMD2 = 1).
00: ALE high and ALE low pulse width = 1 SYSCLK cycle.
01: ALE high and ALE low pulse width = 2 SYSCLK cycles.
10: ALE high and ALE low pulse width = 3 SYSCLK cycles.
11: ALE high and ALE low pulse width = 4 SYSCLK cycles.
SFR Definition 16.2. EMI0CF: External Memory Configuration
chip memory space.
Accesses above the 4k boundary are directed off-chip. 8-bit off-chip MOVX operations
use the current contents of the Address High port latches to resolve upper address byte.
Note that in order to access off-chip space, EMI0CN must be set to a page that is not
contained in the on-chip address space.
Accesses above the 4k boundary are directed off-chip. 8-bit off-chip MOVX operations
use the contents of EMI0CN to determine the high-byte of the address.
CPU.
R/W
Bit6
-
PRTSEL
R/W
Bit5
EMD2
R/W
Bit4
Rev. 1.5
EMD1
R/W
Bit3
EMD0
R/W
Bit2
EALE1
R/W
Bit1
SFR Address:
SFR Page:
EALE0
R/W
Bit0
0xA3
0
00000011
Reset Value