C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 209

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

TX0
RX0
SCK
MISO
MOSI
NSS
SDA
SCL
TX1
RX1
CEX0
CEX1
CEX2
CEX3
CEX4
CEX5
ECI
CP0
CP1
CP2
T0
/INT0
T1
/INT1
T2
T2EX
T3
T3EX
T4
T4EX
/SYSCLK
CNVSTR0
CNVSTR2
PIN I/O 0
z
z
z
z
z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z z z z z z
z
z
z
z
z
1
(EMIFLE = 1; EMIF in Non-multiplexed Mode; P1MDIN = 0xFF)
z
z
z z z z
z z z z
z z z z
z
2
z
z
z z z
z z z
z z z
z
3
P0
z
z z
z
4
z
z
z
5
6
Figure 17.5. Priority Crossbar Decode Table
7
z
z z
z z z
z z z z
z z z z z
z z z z z z
z z z z z z z
z z z z z z z z
z z z z z z z z z
z z z z z z z z z z z
z z z z z z z z z z z z
z z z z z z z z z z z z z
z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z z z z z
z z z z z z z z z z z z z z z z z z z z z z z z
0
AIN1 Inputs/Non-muxed Addr H
NSS is not assigned to a port pin when the SPI is placed in 3-wire mode
z z z z z z z z z
1
2
3
P1
4
5
6
7
Muxed Addr H/Non-muxed Addr L
0
Rev. 1.5
1
2
C8051F040/1/2/3/4/5/6/7
3
P2
4
5
6
7
0
Muxed Data/Non-muxed Data
1
2
3
P3
4
5
6
7
Crossbar Register Bits
UART0EN:
UART1EN:
CNVSTE0: XBR2.0
CNVSTE2: XBR3.2
SMB0EN:
PCA0ME:
SYSCKE: XBR1.7
SPI0EN:
T2EXE: XBR1.6
T3EXE: XBR3.1
T4EXE: XBR2.4
ECI0E: XBR0.6
INT0E: XBR1.2
INT1E: XBR1.4
CP0E: XBR0.7
CP1E: XBR1.0
CP2E: XBR3.3
T0E: XBR1.1
T1E: XBR1.3
T2E: XBR1.5
T3E: XBR3.0
T4E: XBR2.3
XBR0.2
XBR0.1
XBR0.0
XBR2.2
XBR0.[5:3]
209