C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 244

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

C8051F040/1/2/3/4/5/6/7
19.3.4. Slave Receiver Mode
Serial data is received on SDA while the serial clock is received on SCL. The SMBus0 interface receives a
START followed by data byte containing the slave address and direction bit. If the received slave address
matches the address held in register SMB0ADR, the interface generates an ACK. SMBus0 will also ACK if
the general call address (0x00) is received and the General Call Address Enable bit (SMB0ADR.0) is set to
logic 1. In this case the data direction bit (R/W) will be logic 0 to indicate a "WRITE" operation. The
SMBus0 interface receives one or more bytes of serial data; after each byte is received, the interface
transmits an ACK or NACK depending on the state of the AA bit in SMB0CN. SMBus0 exits Slave Receiver
Mode after receiving a STOP condition from the master.
244
S
Received by SMBus
Interface
Transmitted by
SMBus Interface
Figure 19.7. Typical Slave Receiver Sequence
SLA
W
Interrupt
A
Data Byte
Rev. 1.5
Interrupt
A
S = START
P = STOP
A = ACK
R = READ
SLA = Slave Address
Data Byte
Interrupt
A
Interrupt
P