C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 35

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

2.
Table 2.1. Absolute Maximum Ratings*
Ambient temperature under bias
Storage Temperature
Voltage on any Pin (except V
pins) with respect to DGND
Voltage on any Port I/O Pin, /RST, and JTAG pins with
respect to DGND
Voltage on V
Maximum Total current through V
and AGND
Maximum output current sunk by any Port pin
Maximum output current sunk by any other I/O pin
Maximum output current sourced by any Port pin
Maximum output current sourced by any other I/O pin
*Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
Absolute Maximum Ratings
This is a stress rating only and functional operation of the devices at those or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.

Due to special I/O design requirements of the High Voltage Difference Amplifier, undue electrical over-voltage
stress (i.e., ESD) experienced by these pads may result in impedance degradation of these inputs (HVAIN+
and HVAIN–). For this reason, care should be taken to ensure proper handling and use as typically required to
prevent ESD damage to electrostatically sensitive CMOS devices (e.g., static-free workstations, use of
grounding straps, over-voltage protection in end-applications, etc.)
DD
with respect to DGND
Parameter
DD
, Port I/O, and JTAG
DD
, AV+, DGND,
Rev. 1.5
C8051F040/1/2/3/4/5/6/7
Conditions
–0.3
–0.3
–0.3
Min
–55
–65
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
V
Max
125
150
800
100
100
DD
0.3
5.8
4.2
50
50
+
Units
mA
mA
mA
mA
mA
°C
°C
V
V
V
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