DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 23

• Manufacturer Part Number: DO-CPLD-DK-G
• Description: KIT DESIGN CPLD W/BATT HOLDER
• Manufacturer: Xilinx Inc
• Series: CoolRunner™- IIr
• Type: CPLDr

Specifications of DO-CPLD-DK-G

• Contents: Proto Board, Download Cable, Samples, Software
• For Use With/related Products: CoolRunner-ll, XC9500XL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1512

Programmable Logic Design
June 12, 2006
R
packages are surface mount, with more than half of them ball-grid technologies. The ultra-
tiny packages permit maximum functional capacity in the smallest possible area.
The CMOS technology used in CoolRunner-II CPLDs generates minimal heat, allowing the
use of tiny packages during high-speed operation. At least two densities are present in
each package, with three in the VQ100 (100-pin, 1.0 mm QFP) and TQ144 (144-pin, 1.4 mm
QFP), and in the FT256 (256- ball, 1.0 mm-spacing FLBGA). The FT256 is particularly
suited for slim-dimensioned portable products with mid to high-density logic
requirements.
Table 2-1
family. The family has uniform basic features, with advanced features included in densities
where they are most useful. For example, it is unlikely that you would need four I/O banks
on 32- and 64-macrocell parts, but very likely for 384- and 512-macrocell parts.
The I/O banks are groupings of I/O pins using any one of a subset of compatible voltage
standards that share the same V CCIO level. The clock division capability is less efficient
on small parts, but more useful and likely to be used on larger ones. DataGATE™
technology, an ability to block and latch inputs to save power, is valuable in larger parts,
but brings marginal benefit to small parts.
Table 2-1: CoolRunner-II Family Overview
also details the distribution of advanced features across the CoolRunner-II CPLD
17.5mm
17.5mm
LVCMOS, LVTTL
QFG32 (5x5 mm)
VQ44
PC44
QF48
CP56
VQ100 (16x16 mm)
CP132 (8x8 mm)
TQ144 (22x22 mm)
PQ208 (30.6x30.6 mm)
FT256 (17x17 mm)
FG324 (23x23 mm)
DataGATE, CoolCLOCK
Standby Power (μW)
Advanced Security
(7x7 mm)
16mm
16mm
Packages (size)
(12x12 mm)
(17.5x17.5 mm)
(6x6 mm)
F
Max User I/O
HSTL, SSTL
SYSTEM
DualEDGE
I/O Banks
Features
12mm
12mm
(MHz)
(1.5,1.8,2.5,3.3)
www.xilinx.com
8mm
8mm
Figure 2-4: CPLD Packages
7mm
7mm
XC2C32A XC2C64A XC2C128 XC2C256 XC2C384 XC2C512
28.8
6mm
6mm
Yes
Yes
Yes
323
33
21
33
33
33
2
-
-
5mm
5mm
30.6
Yes
Yes
Yes
263
64
33
33
37
45
64
2
-
-
CP56 36m
CP56 36m
QF32
QF32
25m
25m
QF48 49m
QF48 49m
CP132 64m
CP132 64m
Maxium User I/O
2
2
CoolRunner-II Low-Power CPLDs
34.2
244
100
Yes
Yes
Yes
Yes
Yes
VQ44 144m
VQ44 144m
100
100
80
2
2
2
2
2
2
2
VQ100 256m
VQ100 256m
2
2
37.8
Yes
Yes
Yes
Yes
Yes
256
184
106
118
173
184
80
2
PC44 306.25m
PC44 306.25m
2
2
41.4
217
240
Yes
Yes
Yes
Yes
Yes
118
173
212
240
4
2
2
45.0
179
270
Yes
Yes
Yes
Yes
Yes
173
212
270
4
13