DSP56309EVM Freescale Semiconductor, DSP56309EVM Datasheet - Page 120

• Manufacturer Part Number: DSP56309EVM
• Description: KIT EVALUATION FOR XC56309
• Manufacturer: Freescale Semiconductor
• Type: DSPr

Specifications of DSP56309EVM

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Description/function: Audio DSPs
• Product: Audio Modules
• For Use With/related Products: DSP56309
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Host Interface (HI08)
registers (TXH:TXM:TXL on the host side) when both the transmit data register empty
(ISR[TXDE]) on the host side and host receive data full (HSR[HRDF]) on the DSP side are
cleared. The transfer operation sets both ISR[TXDE] and HSR[HRDF]. When the HSR[HRDF]
is set, the HRX register contains valid data. The DSP56309 can set the HCR[HRIE] to cause a
host receive data interrupt when HSR[HRDF] is set. When the DSP56309 reads the HRX
register, the HSR[HRDF] bit is cleared.
Note:
6.6.9 DSP-Side Registers After Reset
Table 6-13 shows the results of the four reset types on the bits in each of the HI08 registers
accessible to the DSP56309. The hardware reset (HW) is caused by the
software reset (SW) is caused by execution of the RESET instruction. The individual reset (IR)
occurs when HPCR[HEN] is cleared. The stop reset (ST) occurs when the STOP instruction
executes.
6.7 Host Programmer Model
The HI08 provides a simple, high-speed interface to a host processor. To the host bus, the HI08
appears to be eight byte-wide registers. Separate transmit and receive data paths are
double-buffered to allow the DSP core and host processor to transfer data efficiently at high
speed. The host can access the HI08 asynchronously using polling techniques or interrupt-based
6-20
Note:
Register
HPCR
HBAR
HDDR
Name
HCR
HSR
HDR
HRX
HTX
A long dash (—) denotes that the bit value is not affected by the specified reset.
The DSP56309 should never try to read the HRX register if the HSR[HRDF] bit is
already cleared.
HRX [23–0]
HTX [23–0]
DR[15–0]
BA[10–3]
Register
HF[1–0]
D[15–0]
All bits
All bits
HTDE
HRDF
Data
HCP
Table 6-13. DSP-Side Registers After Reset
DSP56309 User’s Manual, Rev. 1
Reset
empty
empty
HW
$80
—
0
0
0
0
1
0
0
Reset
empty
empty
SW
$80
—
0
0
0
0
1
0
0
Reset Type
Reset
empty
empty
RESET
IR
—
—
—
—
—
—
0
1
0
Freescale Semiconductor
signal. The
Reset
empty
empty
ST
—
—
—
—
—
—
0
1
0