PIC18F27J53-I/ML Microchip Technology, PIC18F27J53-I/ML Datasheet - Page 356
![IC PIC MCU 128KB FLASH 28QFN](/photos/18/33/183309/qfn-28_sml.jpg)
PIC18F27J53-I/ML
Manufacturer Part Number
PIC18F27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18F27J53-I/ML
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 356 of 586
- Download datasheet (6Mb)
PIC18F47J53 FAMILY
FIGURE 21-4:
FIGURE 21-5:
TABLE 21-5:
DS39964B-page 356
INTCON
PIR1
PIE1
IPR1
PIR3
PIE3
IPR3
RCSTAx
TXREGx
TXSTAx
BAUDCONx
SPBRGHx
SPBRGx
ODCON2
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note 1:
Note:
(Interrupt Reg. Flag)
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREGx
(Transmit Buffer
Reg. Empty Flag)
Write to TXREGx
Name
(Transmit Shift
(Transmit Shift
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
TRMT bit
TXx (pin)
TXxIF bit
TRMT bit
TXx (pin)
TXxIF bit
This timing diagram shows two consecutive transmissions.
These bits are only available on 44-pin devices.
EUSARTx Transmit Register
EUSARTx Baud Rate Generator Register High Byte
EUSARTx Baud Rate Generator Register Low Byte
GIE/GIEH
ABDOVF
PMPIF
PMPIE
PMPIP
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
SSP2IF
SSP2IE
SSP2IP
CSRC
SPEN
Bit 7
—
1 T
ASYNCHRONOUS TRANSMISSION
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK)
CY
(1)
(1)
(1)
Word 1
Transmit Shift Reg
Transmit Shift Reg.
Word 1
Word 1
Word 1
PEIE/GIEL
BCL2IE
BCL2IP
BCL2IF
RCIDL
ADIF
ADIE
ADIP
Bit 6
1 T
RX9
TX9
—
CY
Start bit
Start bit
Word 2
TMR0IE
RXDTP
1 T
RC1IE
RC1IP
RC2IE
RC2IP
RC1IF
RC2IF
SREN
TXEN
Bit 5
—
CY
bit 0
bit 0
Preliminary
TXCKP
INT0IE
CREN
TX1IF
TX1IE
TX1IP
TX2IF
TX2IE
TX2IP
SYNC
bit 1
Bit 4
Word 1
—
bit 1
Word 1
CCP10OD
TMR4IF
TMR4IE
TMR4IP
SSP1IF
SSP1IE
SSP1IP
ADDEN
SENDB
BRG16
RBIE
Bit 3
bit 7/8
CCP9OD
CTMUIF
CTMUIE
CTMUIP
CCP1IE
CCP1IP
bit 7/8
TMR0IF
CCP1IF
BRGH
FERR
Bit 2
—
Word 2
Transmit Shift Reg.
Stop bit
2010 Microchip Technology Inc.
Stop bit
TMR3GIF
TMR3GIE
TMR3GIP
TMR2IE
TMR2IP
TMR2IF
INT0IF
OERR
TRMT
U2OD
WUE
Bit 1
Start bit
Word 2
TMR1IF
TMR1IE
TMR1IP
RTCCIF
RTCCIE
RTCCIP
ABDEN
U1OD
RX9D
TX9D
RBIF
Bit 0
bit 0
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