PIC18F27J53-I/ML Microchip Technology, PIC18F27J53-I/ML Datasheet - Page 423
![IC PIC MCU 128KB FLASH 28QFN](/photos/18/33/183309/qfn-28_sml.jpg)
PIC18F27J53-I/ML
Manufacturer Part Number
PIC18F27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18F27J53-I/ML
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 423 of 586
- Download datasheet (6Mb)
FIGURE 26-3:
26.5
In many applications, it is desirable to have the ability to
detect a drop below, or rise above, a particular threshold.
For example, the HLVD module could be enabled
periodically to detect Universal Serial Bus (USB) attach
or detach.
For general battery applications, Figure 26-4 provides
a possible voltage curve.
Over time, the device voltage decreases. When the
device voltage reaches voltage, V
generates an interrupt at time, T
cause the execution of an ISR, which would allow the
application to perform “housekeeping tasks” and
perform a controlled shutdown before the device
voltage exits the valid operating range at T
The HLVD, thus, would give the application a time
window, represented by the difference between T
T
2010 Microchip Technology Inc.
B
, to safely exit.
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
Applications
HLVDIF
HLVDIF
IRVST
IRVST
V
V
DD
DD
HIGH-VOLTAGE DETECT OPERATION (VDIRMAG =
HLVDIF may not be set
Internal Reference is stable
A
. The interrupt could
A
, the HLVD logic
B
.
A
Internal Reference is stable
and
Preliminary
T
T
IRVST
IRVST
PIC18F47J53 FAMILY
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
FIGURE 26-4:
V
V
A
B
Legend:
HLVDIF cleared in software
V
V
1
A
B
)
= HLVD trip point
= Minimum valid device
TYPICAL HIGH/
LOW-VOLTAGE DETECT
APPLICATION
operating voltage
Time
HLVDIF cleared in software
T
A
V
V
DS39964B-page 423
HLVD
HLVD
T
B
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