PIC18F27J53-I/ML Microchip Technology, PIC18F27J53-I/ML Datasheet - Page 541
![IC PIC MCU 128KB FLASH 28QFN](/photos/18/33/183309/qfn-28_sml.jpg)
PIC18F27J53-I/ML
Manufacturer Part Number
PIC18F27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18F27J53-I/ML
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 541 of 586
- Download datasheet (6Mb)
TABLE 31-18: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
FIGURE 31-11:
TABLE 31-19: PARALLEL MASTER PORT WRITE TIMING REQUIREMENTS
2010 Microchip Technology Inc.
Param.
PM1
PM2
PM3
PM5
PM6
PM7
Param.
PM11
PM12
PM13
PM16
System
Clock
PMA<13:18>
PMD<7:0>
PMRD
PMWR
PMALL/
PMALH
PMCS<2:1>
No
No
Note:
Symbol
Symbol
Operating Conditions: 2.0V < V
Q1
PMALL/PMALH Pulse Width
Address Out Valid to PMALL/PMALH
Invalid (address setup time)
PMALL/PMALH Invalid to Address Out
Invalid (address hold time)
PMRD Pulse Width
PMRD or PMENB Active to Data In Valid
(data setup time)
PMRD or PMENB Inactive to Data In Invalid
(data hold time)
PMWR Pulse Width
Data Out Valid before PMWR or PMENB
goes Inactive (data setup time)
PMWR or PMEMB Invalid to Data Out
Invalid (data hold time)
PMCS Pulse Width
PARALLEL MASTER PORT WRITE TIMING DIAGRAM
Address<7:0>
Q2
Characteristics
Characteristics
Q3
DD
< 3.6V, -40°C < T
Address
Q4
Preliminary
PM16
Q1
PIC18F47J53 FAMILY
A
< +85°C unless otherwise stated.
PM12
Q2
T
CY
Min
Data
Min
—
—
—
—
—
—
PM11
—
—
—
– 5
Q3
0.75 T
0.25 T
0.5 T
0.5 T
0.5 T
Typ
Typ
—
—
—
—
—
PM13
Q4
CY
CY
CY
CY
CY
Q1
Max
DS39964B-page 541
Max
—
—
—
—
—
—
—
—
—
—
Q2
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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