PIC18F27J53-I/ML Microchip Technology, PIC18F27J53-I/ML Datasheet - Page 36
![IC PIC MCU 128KB FLASH 28QFN](/photos/18/33/183309/qfn-28_sml.jpg)
PIC18F27J53-I/ML
Manufacturer Part Number
PIC18F27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18F27J53-I/ML
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 36 of 586
- Download datasheet (6Mb)
PIC18F47J53 FAMILY
FIGURE 3-1:
DS39964B-page 36
T1OSO
Note 1:
T1OSI
OSC2
OSC1
2:
3:
4:
Secondary Oscillator
Primary Oscillator
The PLL requires a 4 MHz input and it produces a 96 MHz output. The PLL will not be available until the PLLEN bit
in the OSCTUNE register is set. Once the PLLEN bit is set, the PLL requires up to t
device continues to be clocked at the PLL bypassed frequency.
In order to use the USB module in Full-Speed mode, this node must be run at 48 MHz. For Low-Speed mode, this
node may be run at either 48 MHz or 24 MHz, but the CPDIV bits must be set such that the USB module is clocked
at 6 MHz.
Selecting the Timer1 clock or postscaled internal clock will turn off the primary oscillator (unless required by the
reference clock of Section 3.6 “Reference Clock Output”) and PLL.
The USB module cannot be used to communicate unless the primary clock source is selected.
Oscillator
Internal
PIC18F47J53 FAMILY CLOCK DIAGRAM
INTRC
31 kHz
8 MHz
Block
8 MHz
CFGPLLEN
F
OSC
1
0
PLLEN
2
1
0
1
0
Preliminary
500 kHz
250 kHz
125 kHz
12
10
31 kHz
8 MHz
4 MHz
2 MHz
1 MHz
6
5
4
3
2
1
PLLDIV<2:0>
OSCCON<6:4>
000
001
010
011
100
101
110
111
OSCTUNE<7>
111
110
101
100
011
010
001
000
6
3
2
1
4 MHz
(Note 2)
CPDIV<1:0>
00
01
10
11
96 MHz
PLL
Postscaled
Internal Clock
(1)
Timer1 Clock
FOSC<2:1>
00
2
Primary Clock
Source
OSCCON<1:0>
48 MHz
(3)
(4)
00
01
11
8
4
2010 Microchip Technology Inc.
rc
LS48MHZ
to lock. During this time, the
Enabled Modes
1
0
WDT, PWRT, FSCM
and Two-Speed Start-up
Peripherals
CLKO
IDLE
FSEN
1
0
CPU
USB Module
Clock
Needs 48 MHz for FS
Needs 6 MHz for LS
4
RA6
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