HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 1114

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Appendix C Mode Pin Settings
• Clock Operating Modes (SH7750R)
Clock
Operating
Mode
0
1
2
3
4
5
6
Notes: 1. The multiplication factor of PLL 1 is solely determined by the clock operating mode.
(2) Area 0 Bus Width
MD6
0
1
Rev.7.00 Oct. 10, 2008 Page 1028 of 1074
REJ09B0366-0700
2. For the ranges of input clock frequency, see the descriptions of the EXTAL clock input
frequency (f
Timing.
MD2
0
1
MD4
0
1
0
1
Pin Combination
Pin Value
External
MD1
0
1
0
1
EX
) and CKIO clock output (f
MD0
0
1
0
1
0
1
0
MD3
0
1
0
1
0
1
0
1
PLL1
On (×12) On
On (×12) On
On (×6)
On (×12) On
On (×6)
On (×12) On
Off (×6)
Bus Width
64 bits
8 bits
16 bits
32 bits
64 bits
8 bits
16 bits
32 bits
PLL2
On
On
Off
OP
CPU
Clock
12
12
6
12
6
12
1
) in section 22.3.1, Clock and Control Signal
(vs. Input Clock)
2
4
3
1/2
Bus
Clock
3
3/2
6
Frequency
Memory Type
MPX interface
Reserved (setting prohibited)
Reserved
MPX interface
SRAM interface
SRAM interface
SRAM interface
SRAM interface
Peripheral
Module Clock
3
3/2
1
2
3/2
3
1/2
FRQCR
Initial Value
H'0E1A
H'0E2C
H'0E13
H'0E13
H'0E0A
H'0E0A
H'0808

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