HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 344

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Section 8 Pipelining
8.4
Usage Notes
The following are additional notes on pipeline operation and the method of calculating the number
of clock cycles.
The number of states (I clock cycles) required for stages where an external bus access, etc., occurs
may include an increased number of cycles, in addition to the number of memory access cycles set
by the bus state controller (BSC), etc.
For example, the occurrence of the following may result in idle cycles as observed from the
external bus.
1. Transfer of data from the logical address bus to the physical address bus
2. Transfer of data between buses using different operation clocks
The stages where external memory access occurs include some instruction fetch (I) and some
memory access (MA) stages.
Rev.7.00 Oct. 10, 2008 Page 258 of 1074
REJ09B0366-0700

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