HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 431

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

The TCNT registers for channels 0 to 2 are initialized to H'FFFFFFFF by a power-on or manual
reset, but are not initialized and retain their contents in standby mode. The TCNT registers for
channels 3 and 4 of the SH7750R are initialized to H'FFFFFFFF by a power-on reset, but are not
initialized and retain their contents on a manual reset and in standby mode.
When the input clock is the on-chip RTC output clock (RTCCLK) in channels 0 to 2, TCNT
counts even in module standby mode (that is, when the clock for the TMU is stopped). When the
input clock is the external clock (TCLK) or internal clock (Pck), TCNT contents are retained in
standby mode.
12.2.6
The TCR registers are 16-bit readable/writable registers. There are five TCR registers, one for
each channel.
Each TCR selects the count clock, specifies the edge when an external clock is selected in
channels 0 to 2, and controls interrupt generation when the flag indicating timer counter (TCNT)
underflow is set to 1. TCR2 is also used for channel 2 input capture control, and control of
interrupt generation in the event of input capture.
The TCR registers for channels 0 to 2 are initialized to H'0000 by a power-on or manual reset, but
are not initialized and retain their contents in standby mode. The TCR registers for channels 3 and
4 of the SH7750R are initialized to H'0000 by a power-on reset, but are not initialized and retain
their contents on a manual reset and in standby mode.
Initial value:
Timer Control Registers (TCR)
R/W:
Bit:
R/W
31
1
R/W
30
1
R/W
29
1
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Rev.7.00 Oct. 10, 2008 Page 345 of 1074
Section 12 Timer Unit (TMU)
R/W
2
1
REJ09B0366-0700
R/W
1
1
R/W
0
1