HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 661

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
1. Transfer requests are issued simultaneously for channels 0 and 3.
2. Since channel 0 has a higher priority level than channel 3, the channel 0 transfer is executed
3. A transfer request is issued for channel 1 during the channel 0 transfer (channels 1 and 3 are on
4. At the end of the channel 0 transfer, channel 0 shifts to the lowest priority level.
5. At this point, channel 1 has a higher priority level than channel 3, so the channel 1 transfer is
6. At the end of the channel 1 transfer, channel 1 shifts to the lowest priority level.
7. The channel 3 transfer is started.
8. At the end of the channel 3 transfer, the channel 3 and channel 2 priority levels are lowered,
first (channel 3 is on transfer standby).
transfer standby).
started (channel 3 is on transfer standby).
giving channel 3 the lowest priority.
Figure 14.4 Example of Changes in Priority Order in Round Robin Mode
Transfer request
1. Issued for channels 0
3. Issued for channel 1
and 3
Channel
waiting
3
1, 3
3
None
Section 14 Direct Memory Access Controller (DMAC)
2. Start of channel 0
4. End of channel 0
5. Start of channel 1
6. End of channel 1
7. Start of channel 3
8. End of channel 3
DMAC operation
transfer
transfer
transfer
transfer
transfer
transfer
Rev.7.00 Oct. 10, 2008 Page 575 of 1074
Change of
priority order
Change of
priority order
Change of
priority order
Channel priority
0 > 1 > 2 > 3
1 > 2 > 3 > 0
2 > 3 > 0 > 1
0 > 1 > 2 > 3
order
REJ09B0366-0700

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