LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 108

• Manufacturer Part Number: LPC47N227TQFP
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47N227TQFP

• Lead Free Status / RoHS Status: Not Compliant

3. Status Register reads: nBUSY = 0, PE = 0, SLCT = 0, nACK = 1, nERR = 1
The following FDC pins are all in the high impedence state when the PPFDC is actually selected by the
drive select register:
1. nWDATA, DENSEL, nHDSEL, nWGATE, nDIR, nSTEP, nDS1, nDS0, nMTR0, nMTR1.
2. If PPFDx is selected, then the parallel port can not be used as a parallel port until "Normal" mode is
selected.
The FDC signals are muxed onto the Parallel Port pins as shown in Table 43.
For ACPI compliance the FDD pins that are multiplexed onto the Parallel Port function independently of
the state of the Parallel Port controller. For example, if the FDC is enabled onto the Parallel Port the
multiplexed FDD interface functions normally regardless of the Parallel Port Power control, CR01.2.
Table 42 illustrates this functionality.
CR01.2
1
0
X
NOTE
is enabled; i.e., STROBE = AUTOFD = SLC = 0 and nINIT = 1.
PARALLEL PORT
POWER
1
: The Parallel Port Control register reads as “Cable Not Connected” when the Parallel Port FDC
CR04.3
0
0
1
X
PARALLEL PORT FDC
Table 42 - Modified Parallel Port FDD Control
CONTROL
CR04.2
0
0
X
1
108
OFF
OFF
ON
PARALLEL PORT
FDC STATE
ON
OFF
OFF
(NOTE
PARALLEL PORT
1
)
STATE