PSB21150FV14XT Lantiq, PSB21150FV14XT Datasheet - Page 140

• Manufacturer Part Number: PSB21150FV14XT
• Manufacturer: Lantiq

Specifications of PSB21150FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

3.8
3.8.1
The AUX interface provides various functions, which depend on the operation mode (TE,
LT-T, LT-S, NT or Intelligent NT mode) selected by pins MODE0 and MODE1/EAW (see
Table
by the host.
Table 15
Pin
AUX0
AUX1
AUX2
AUX3
AUX4
AUX5
AUX6
AUX7
AUX0-5 (TE, Int. NT mode), AUX3-5 (LT-T, LT-S, NT mode)
These pins can be used as programmable I/O lines.
As inputs (AOE.OEx=1) the state at the pin is latched in when the host performes read
operation to register ARX.
As outputs (AOE.OEx=0) the value in register ATX is driven on the pins with a minimum
delay after the write operation to this register is performed. They can be configured as
open drain (ACFG1.ODx=0) or push/pull outputs (ACFG1.ODx=1). The status (’1’ or ’0’)
at output pins can be read back from register ARX, which may be different from the ATX
value, e.g. if another device drives a different level.
FBOUT
AUX5 is multiplexed with the selectable FSC/BCL output FBOUT, i.e. the host can select
either standard I/O characteristic (ACFG2.A5SEL=0, default) or FBOUT functionality
(ACFG2.A5SEL=1). FBOUT provides either an FSC (ACFG2.FBS=0, default) or BCL
signal (ACFG2.FBS=1) which are derived from the DCL clock (also see
Data Sheet
15). After reset the pins are switched as inputs until further configuration is done
Auxiliary Interface
Mode Dependent Functions
AUX Pin Functions
TE, Int. NT mode
AUX0 (i/o)
AUX1 (i/o)
AUX2 (i/o)
AUX3 (i/o)
AUX4 (i/o) / MBIT
AUX5 (i/o) / FBOUT (o)
INT0 (i/o)
INT1 (i/o) / SGO (o)
140
LT-T, LT-S, NT mode
CH0 (i)
CH1 (i)
CH2 (i)
AUX3 (i/o)
AUX4 (i/o) / MBIT
AUX5 (i/o) / FBOUT (o)
INT0 (i/o)
INT1 (i/o) / SGO (o)
Description of Functional Blocks
PSB/PSF 21150
Chapter
2003-01-30
IPAC-X
3.4).