PSB21150FV14XT Lantiq, PSB21150FV14XT Datasheet - Page 67

• Manufacturer Part Number: PSB21150FV14XT
• Manufacturer: Lantiq

Specifications of PSB21150FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

– The external local loop (external Loop A) is activated in the same way as the
– In remote line loop (RLP) received data is looped back to the S/T interface. The D-
Figure 36
– Transmission of special test signals on the S/T interface according to the modified AMI
Two kinds of test signals may be transmitted by the IPAC-X:
– The single pulses are of alternating polarity. One pulse is transmitted in each frame
Data Sheet
is disabled.
The transmit data of the transmitter is looped back internally to the receiver. The data
of the IOM-2 input B- and D-channels are looped back to the output B- and D-
channels.
The S/T interface level detector is enabled, i.e. if a level is detected this will be
reported by the Resynchronization Indication (RSY) but the loop function is not
affected.
Depending on the DIS_TX bit in the TR_CONF2 register the internal local loop can be
transparent or non transparent to the S/T line.
internal local loop described above. Additionally the EXLP bit in the TR_CONF0
register has to be programmed and the loop has to be closed externally as described
in
The S/T interface level detector is disabled.
This allows complete system diagnostics.
channel information received from the line card is transparently forwarded to the
output IOM-2 D-channel. The output B-channel information on IOM-2 is fixed to ‘FF’
while this test loop is active. The remote loop is programmable in TR_CONF2.RLP.
code are initiated via a C/I command written in CIX0 register (see
resulting in a frequency of the fundamental mode of 2 kHz. The corresponding C/I
command is SSP (Send Single Pulses).
Figure
36.
External Loop at the S/T-Interface
SCOUT-S(X)
SX1
SX2
SR1
SR2
67
Description of Functional Blocks
100 W
100 W
Chapter
PSB/PSF 21150
2003-01-30
3.5.4).
IPAC-X
H