PSB21150FV14XT Lantiq, PSB21150FV14XT Datasheet - Page 233

• Manufacturer Part Number: PSB21150FV14XT
• Manufacturer: Lantiq

Specifications of PSB21150FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

RBCLB
RBCHB
RAL1
4.6.9
Value after reset: 00
RBC7-0 ... Receive Byte Count
Eight least significant bits of the total number of bytes in a received message (see
RBCHB register).
4.6.10
Value after reset: 00
OV ... Overflow
A ’1’ in this bit position indicates a message longer than (2
RBC8-11 ... Receive Byte Count
Four most significant bits of the total number of bytes in a received message (see
RBCLB register).
Note: Normally RBCHB and RBCLB should be read by the microcontroller after an RME-
4.6.11
Value after reset: 00
Data Sheet
interrupt in order to determine the number of bytes to be read from the RFIFOB,
and the total message length. The contents of the registers are valid only after an
RME or RPF interrupt, and remain so until the frame is acknowledged via the RMC
bit or RRES.
7
7
7
RBC7
RBCLB - Receive Frame Byte Count Low B-Channels
RBCHB - Receive Frame Byte Count High B-Channels
RAL1 - RAL1 Register 1
0
H
H
H
0
.
0
OV
RAL1
233
RBC11
Detailed Register Description
12
- 1) = 4095 bytes .
0
0
0
RBC0
RBC8
PSB/PSF 21150
WR (77/87)
RD (76/86)
RD (77/87)
2003-01-30
IPAC-X