ADC1112D125F2/DB,598 NXP Semiconductors, ADC1112D125F2/DB,598 Datasheet - Page 22

no-image

ADC1112D125F2/DB,598

Manufacturer Part Number
ADC1112D125F2/DB,598
Description
BOARD EVALUATION FOR ADC1112D125
Manufacturer
NXP Semiconductors
Series
-r

Specifications of ADC1112D125F2/DB,598

Design Resources
ADC1x12D Demo Brd PCB Files
Number Of Adc's
2
Number Of Bits
11
Sampling Rate (per Second)
125M
Data Interface
Serial, LVDS/DDR
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
1.23W @ 125MSPS
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1112D125
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6891
NXP Semiconductors
ADC1112D125
Product data sheet
11.3.4 Biasing
11.4.1 Drive modes
11.4 Clock input
The common-mode input voltage (V
set externally to 0.5V
and 2 V (see
The ADC1112D125 can be driven differentially (LVPECL). It can also be driven by a
single-ended LVCMOS signal connected to pin CLKP (pin CLKM should be connected to
ground via a capacitor) or pin CLKM (pin CLKP should be connected to ground via a
capacitor).
Fig 25. Equivalent schematic of the common-mode reference circuit
Fig 26. LVCMOS single-ended clock input
a. Rising edge LVCMOS
VCMA/VCMB
clock input
0.1 μF
LVCMOS
1.5 V
Table
All information provided in this document is subject to legal disclaimers.
6).
DDA
Package
Rev. 2 — 3 March 2011
for optimal performance and should always be between 0.9 V
005aaa174
CLKM
CLKP
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
ESD
I(cm)
) on pins INAP/INBP and INAM/INBM should be
Parasitics
b. Falling edge LVCMOS
COMMON MODE
REFERENCE
clock input
LVCMOS
ADC1112D125
ADC CORE
© NXP B.V. 2011. All rights reserved.
005aaa053
CLKM
CLKP
005aaa099
22 of 41

Related parts for ADC1112D125F2/DB,598