ADC1112D125F2/DB,598 NXP Semiconductors, ADC1112D125F2/DB,598 Datasheet - Page 4

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ADC1112D125F2/DB,598

Manufacturer Part Number
ADC1112D125F2/DB,598
Description
BOARD EVALUATION FOR ADC1112D125
Manufacturer
NXP Semiconductors
Series
-r

Specifications of ADC1112D125F2/DB,598

Design Resources
ADC1x12D Demo Brd PCB Files
Number Of Adc's
2
Number Of Bits
11
Sampling Rate (per Second)
125M
Data Interface
Serial, LVDS/DDR
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
1.23W @ 125MSPS
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1112D125
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6891
NXP Semiconductors
ADC1112D125
Product data sheet
Table 2.
Symbol
VCMB
AGND
INBM
INBP
VDDA
VDDA
SCLK/DFS
SDIO/ODS
CS
CTRL
DECB
OTRB
DB10
DB9
DB8
DB7
DB6
DB5
VDDO
VDDO
DB4
DB3
DB2
DB1
DB0
n.c.
n.c.
n.c.
n.c.
DAV
n.c.
n.c.
n.c.
DA0
DA1
DA2
VDDO
VDDO
DA3
DA4
DA5
DA6
DA7
DA8
Pin description (CMOS digital outputs)
Pin
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
All information provided in this document is subject to legal disclaimers.
Type
O
G
I
I
P
P
I
I/O
I
I
O
O
O
O
O
O
O
O
P
P
O
O
O
O
O
O
O
O
-
O
O
O
O
O
O
O
P
P
O
O
O
O
O
O
Rev. 2 — 3 March 2011
[1]
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
Description
common-mode output voltage; channel B
analog ground
complementary analog input; channel B
analog input; channel B
analog power supply
analog power supply
SPI clock/data format select
SPI data input/output/output data standard
SPI chip select, active LOW
control mode select
regulator decoupling node; channel B
out-of-range; channel B
data output bit 10 (Most Significant Bit (MSB)); channel B
data output bit 9; channel B
data output bit 8; channel B
data output bit 7; channel B
data output bit 6; channel B
data output bit 5; channel B
output power supply
output power supply
data output bit 4; channel B
data output bit 3; channel B
data output bit 2; channel B
data output bit 1; channel B
data output bit 0 (Least Significant Bit (LSB)); channel B
not connected
not connected
not connected
not connected
data valid output clock
not connected
not connected
not connected
data output bit 0 (LSB); channel A
data output bit 1; channel A
data output bit 2; channel A
output power supply
output power supply
data output bit 3; channel A
data output bit 4; channel A
data output bit 5; channel A
data output bit 6; channel A
data output bit 7; channel A
data output bit 8; channel A
…continued
ADC1112D125
© NXP B.V. 2011. All rights reserved.
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