ADC1112D125F2/DB,598 NXP Semiconductors, ADC1112D125F2/DB,598 Datasheet - Page 23

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ADC1112D125F2/DB,598

Manufacturer Part Number
ADC1112D125F2/DB,598
Description
BOARD EVALUATION FOR ADC1112D125
Manufacturer
NXP Semiconductors
Series
-r

Specifications of ADC1112D125F2/DB,598

Design Resources
ADC1x12D Demo Brd PCB Files
Number Of Adc's
2
Number Of Bits
11
Sampling Rate (per Second)
125M
Data Interface
Serial, LVDS/DDR
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
1.23W @ 125MSPS
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1112D125
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6891
NXP Semiconductors
ADC1112D125
Product data sheet
11.4.2 Equivalent input circuit
The equivalent circuit of the input clock buffer is shown in
voltage of the differential input stage is set via internal 5 kΩ resistors.
Fig 27. Differential clock input
Fig 28. Equivalent input circuit
a. Sine clock input
c. LVPECL clock input
V
CLKM
CLKP
cm(clk)
clock input
Sine
= common-mode voltage of the differential input stage.
All information provided in this document is subject to legal disclaimers.
Package
Rev. 2 — 3 March 2011
005aaa173
CLKM
CLKP
ESD
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
clock input
LVPECL
Parasitics
005aaa172
CLKM
CLKP
clock input
b. Sine clock input (with transformer)
Sine
SE_SEL
Figure
5 kΩ
ADC1112D125
V
cm(clk)
28. The common-mode
SE_SEL
5 kΩ
© NXP B.V. 2011. All rights reserved.
005aaa056
005aaa054
CLKM
CLKP
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