MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 19

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

B-10
B-11
B-12
C-1
C-2
C-3
C-4
C-5
C-6
C-7
C-8
C-9
C-10
C-11
C-12
C-13
C-14
C-15
C-16
C-17
C-18
C-19
C-20
C-21
MOTOROLA
Number
Figure
MC68040V and MC68EC040V Functional Signal Groups ........................... C-3
MC68040V and MC68EC040V Initial Power-On Reset Timing ................... C-8
MC68040V and MC68EC040V Normal Reset Timing.................................. C-9
MC68040V and MC68EC040V Test Logic Block Diagram .......................... C-11
Bypass Register ........................................................................................... C-13
Output Latch Cell (O.Latch) ......................................................................... C-14
Input Pin Cell (I.Pin) ..................................................................................... C-14
Output Control Cells (IO.Ctl) ........................................................................ C-15
General Arrangement of Bidirectional Pins .................................................. C-15
Circuit Disabling IEEE Standard 1149.1A ................................................... C-17
Drive Levels and Test Points for AC Specifications ..................................... C-18
Clock Input Timing Diagram ......................................................................... C-21
Read/Write Timing........................................................................................ C-24
Bus Arbitration Timing .................................................................................. C-25
Snoop Hit Timing.......................................................................................... C-26
Snoop Miss Timing....................................................................................... C-27
Other Signal Timing ..................................................................................... C-28
Going into LPSTOP with Arbitration ............................................................. C-29
LPSTOP no Arbitration, CPU is Master ....................................................... C-30
Exiting LPSTOP with Interrupt...................................................................... C-31
Exiting of LPSTOP with RESET ................................................................... C-31
Snoop Hit Timing.......................................................................................... B-19
Snoop Miss Timing....................................................................................... B-20
Other Signal Timing ..................................................................................... B-21
LIST OF ILLUSTRATIONS (Continued)
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M68040 USER’S MANUAL
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