MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 35

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

1-14
ANDI to CCR
ANDI to SR
ASL, ASR
BFEXTS
BFEXTU
Opcode
BFCHG
BFCLR
BFFFO
BFSET
BFINS
BFTST
ABCD
ADDA
ADDQ
ADDX
BCHG
BCLR
BKPT
BSET
ADDI
ANDI
ADD
AND
BRA
BSR
Bcc
BCD Source + BCD Destination + X ø Destination
Source + Destination ø Destination
Source + Destination ø Destination
Immediate Data + Destination ø Destination
Immediate Data + Destination ø Destination
Source + Destination + X ø Destination
Source
Immediate Data
Source
else TRAP
If condition true
~(bit number of Destination) ø Z;
~(bit number of Destination) ø (bit number) of
Destination
~(bit number of Destination) ø Z;
0 ø bit number of Destination
~(bit field of Destination) ø bit field of Destination
0 ø bit field of Destination
bit field of Source ø Dn
bit offset of Source Bit Scan ø Dn
Dn ø bit field of Destination
1s ø bit field of Destination
bit field of Destination
Run breakpoint acknowledge cycle;
TRAP as illegal instruction
PC + d n ø PC
~(bit number of Destination) ø Z;
1 ø bit number of Destination
SP – 4 ø SP; PC ø (SP); PC + d n ø PC
If supervisor state
Destination Shifted by count ø Destination
bit offset of Source ø Dn
then Source
then PC + d n ø PC
CCR ø CCR
Destination ø Destination
Freescale Semiconductor, Inc.
Table 1-4. Instruction Set Summary
For More Information On This Product,
SR ø SR
Destination ø Destination
Operation
M68040 USER’S MANUAL
Go to: www.freescale.com
ABCD Dy,Dx
ABCD –(Ay),–(Ax)
ADD <ea>,Dn
ADD Dn,<ea>
ADDA <ea>,An
ADDI #<data>,<ea>
ADDQ #<data>,<ea>
ADDX Dy,Dx
ADDX –(Ay),–(Ax)
AND <ea>,Dn
AND Dn,<ea>
ANDI #<data>,<ea>
ANDI #<data>,CCR
ANDI #<data>,SR
ASd Dx,Dy 1
ASd #<data>,Dy 1
ASd <ea> 1
Bcc <label>
BCHG Dn,<ea>
BCHG #<data>,<ea>
BCLR Dn,<ea>
BCLR #<data>,<ea>
BFEXTS <ea>{offset:width},Dn
BFEXTU <ea>{offset:width},Dn
BFFFO <ea>{offset:width},Dn
BFINS Dn,<ea>{offset:width}
BFSET <ea>{offset:width}
BFTST <ea>{offset:width}
BKPT #<data>
BRA <label>
BSET Dn,<ea>
BSET #<data>,<ea>
BSR <label>
BFCHG <ea>{offset:width}
BFCLR <ea>{offset:width}
Syntax
MOTOROLA