MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 40

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

MOTOROLA
ROXL, ROXR
ORI to CCR
ROL, ROR
ORI to SR
PFLUSH 8
Opcode
PTEST 8
RESET
PACK
SBCD
STOP
NOP
NOT
SUB
PEA
RTD
RTE
RTR
RTS
ORI
Scc
OR
None
~ Destination ø Destination
Source V Destination ø Destination
Immediate Data V Destination ø Destination
Source V CCR ø CCR
If supervisor state
else TRAP
Source (Unpacked BCD) + adjustment ø
SP – 4 ø SP; <ea> ø (SP)
If supervisor state
else TRAP
If supervisor state
else TRAP
If supervisor state
else TRAP
Destination Rotated by count ø Destination
Destination Rotated with X by count ø Destination
(SP) ø PC; SP + 4 + d n ø SP
If supervisor state
else TRAP
(SP) ø CCR; SP + 2 ø SP;
(SP) ø PC; SP + 4 ø SP
(SP) ø PC; SP + 4 ø SP
Destination10 – Source 10 – X ø Destination
If condition true
else 0s ø Destination
If supervisor state
else TRAP
Destination – Source ø Destination
then Source V SR ø SR
Destination (Packed BCD)
then invalidate instruction and data ATC entries
for destination address
then logical address status ø MMUSR;
entry ø ATC
then Assert RSTO Line
then (SP) ø SR; SP + 2 ø SP; (SP) ø PC;
SP + 4 ø SP; restore state and deallocate
stack according to (SP)
then 1s ø Destination
then Immediate Data ø SR; STOP
Table 1-4. Instruction Set Summary (Continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
Operation
Go to: www.freescale.com
M68040 USER’S MANUAL
NOP
OR Dn,<ea>
ORI #<data>,CCR
ORI #<data>,SR
PACK –(Ax),–(Ay),#(adjustment)
PACK Dx,Dy,#(adjustment)
PEA <ea>
PFLUSH (An)
PFLUSHN (An)
PFLUSHA
PFLUSHAN
PTESTR (An)
PTESTW (An)
RESET
ROd #<data>,Dy 1
ROXd #<data>,Dy 1
ROXd <ea> 1
RTD #(d n )
RTE
RTR
RTS
SBCD Dx,Dy
SBCD –(Ax),–(Ay)
Scc <ea>
STOP #<data>
SUB Dn,<ea>
NOT <ea>
OR <ea>,Dn
ORI #<data>,<ea>
ROd Rx,Dy 1
ROXd Dx,Dy 1
SUB <ea>,Dn
Syntax
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