MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 440

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

MC68EC040
MC68LC040
Memory Controller, 7-13
Memory Management Unit (MMU), 1-4
Memory Management Unit Registers, 3-33
Misaligned Access, 4-3, 4-11, 10-3
Misaligned Operand, 7-6, 7-37
Multiplexed Bus Mode, 1-2, 5-4, 5-5, 7-69, A-5
Multiplexer, 7-3
MOTOROLA
4-Kbyte Page Size, B-4
Access Control Registers, see Access Control
Address Space, B-5
DLE Mode, 1-2
Electrical Characteristics, 11-19
Exception Processing, B-10
Multiplexed Bus Mode, 1-2
Output Buffer Mode, 1-2
Special Modes of Operation, 1-2, B-5
Unimplemented Floating-Point Instruction
DLE Mode, 1-2, A-5
Electrical Characteristics, 11-15
Exception Processing, A-6
F-Line Exception, A-6
Main Features, A-2
Multiplex Bus Mode, 1-2, A-5
Output Buffers, A-5
Special Modes of Operation, 1-2
Unimplemented Floating-Point Instruction
Cache Controller, 3-2
Disable Dynamically, 5-14
Memory Controller, 7-13
Translation Tables, 3-2
Initializing, 3-32
MMU Status Register (MMUSR), 1-8, 3-3, 3-15
Supervisor Root Pointer (SRP), 1-8, 3-3
Translation Control Register (TCR), 1-8, 3-4;
Transparent Translation Registers (TTR), 1-4,
User Root Pointer (URP), 1-8, 3-3
Unit
Exceptions, 1-2, B-10
Exceptions, 1-2, A-5
Field Definitions, 3-6, 3-7
Status Bits, 3-34
Field Definitions, 3-4; E-Bit 3-33;
P-Bit, 3-32, 8-17
1-7, 3-2, 3-3, 3-29, 3-30, 4-6, 5-7, 8-17;
Field Definitions, 3-5
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
NAN, see Data Types
Normalized, see Data Types
Operand Size, 1-9
Output Buffer Mode, 1-2, 7-69, 11-29
Packed Decimal Real, 9-22
Page Descriptor, see Descriptors
Page Index Field (PGI), 3-8
Page Size, 3-4, 3-12, 8-17
Paged Memory, 3-1, 3-21
Page Offset Field, 3-8
Page State Information, 4-10
PDT Field 3-17, see also Descriptors
Physical Address, 3-2, 3-8, 3-9, 3-29, 4-3
Pointer Index Field (PI), 3-8
Power Dissipation, 11-29
PRIVATE, 6-3
Privilege Modes, 1-5
Processing States, 1-5–1-6
Push Bus Cycles, see Bus Cycles
Range Control, 9-13
Read-Modify-Write Bus Cycles, see Bus Cycles
Registers
Replacement Algorithm, 4-4
Reset Operation, 2-8, 3-4, 3-32, 4-3, 4-5, 5-9,
Retry Operation, 4-12, 7-41, 7-42, 7-55
Root Index Field (RI), 3-8
4 Kbytes, 3-9, 3-29, B-4
8 Kbytes, 3-6, 3-9, 3-29
Translation of, see Address Translation
User, 1-6, 2-7
Supervisor, 1-6, 2-7, 3-3, 4-5
Floating-Point Unit, see Floating-Point Unit
Integer Unit, see Integer Unit Registers
JTAG, see JTAG Registers
Memory Management Unit, see Memory
5-11, 7-66, 9-3, 9-4, 9-6, 9-39, 11-29, 11-30
Registers
Management Unit Registers
–O–
–N–
–P–
–R–
INDEX-5