Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 120

IC ENCORE XP MCU FLSH 12K 20QFN

Z8F1233QH020SG

Manufacturer Part Number
Z8F1233QH020SG
Description
IC ENCORE XP MCU FLSH 12K 20QFN
Manufacturer
Zilog
Series
Encore!®r
Datasheets

Specifications of Z8F1233QH020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4656

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F1233QH020SG
Manufacturer:
Zilog
Quantity:
670
PS025111-1207
Caution:
Byte Programming
Page Erase
Mass Erase
The Flash memory is enabled for byte programming after unlocking the Flash controller
and successfully enabling either mass erase or page erase. When the Flash controller is
unlocked and mass erase is successfully enabled, all the program memory locations are
available for byte programming. In contrast, when the Flash controller is unlocked and
page erase is successfully enabled, only the locations of the selected page are available for
byte programming. An erased Flash byte contains all 1’s (
operation can only be used to change bits from 1 to 0. To change a Flash bit (or multiple
bits) from 0 to 1 requires execution of either the page erase or mass erase commands.
Byte programming can be accomplished using the On-Chip Debugger's write memory
command or eZ8 CPU execution of the LDC or LDCI instructions. Refer to the eZ8 CPU
User Manual (available for download at www.zilog.com) for the description of the
and
CPU idles, but the system clock and on-chip peripherals continue to operate. To exit
programming mode and lock the Flash, write any value to the Flash control register,
except the mass erase or page erase commands.
The Flash memory can be erased one page (512 bytes) at a time. Page erasing the Flash
memory sets all bytes in that page to the value
identifies the page to be erased. Only a page residing in an unprotected sector can be
erased. With the Flash controller unlocked and the active page set, writing the value
to the Flash control register initiates the Page Erase operation. While the Flash controller
executes the Page Erase operation, the eZ8 CPU idles, but the system clock and on-chip
peripherals continue to operate. The eZ8 CPU resumes operation after the page erase
operation completes. If the Page Erase operation is performed using the On-Chip
Debugger, poll the Flash status register to determine when the Page Erase operation is
complete. When the page erase is complete, the Flash controller returns to its Locked
state.
The Flash memory can also be mass erased using the Flash controller, but only by using
the On-Chip Debugger. Mass erasing the Flash memory sets all bytes to the value
With the Flash controller unlocked and the mass erase successfully enabled, writing the
value
controller executes the Mass Erase operation, the eZ8 CPU idles, but the system clock and
on-chip peripherals continue to operate. Using the On-Chip Debugger, poll the Flash
The byte at each address of the Flash memory cannot be programmed (any bits written
to 0) more than twice before an erase cycle occurs.
LDCI
63H
instructions. While the Flash controller programs the Flash memory, the eZ8
to the Flash control register initiates the Mass Erase operation. While the Flash
FFH
. The Flash page select register
FFH
Z8 Encore!
). The programming
Product Specification
®
F0830 Series
Flash Memory
FFH
LDC
95h
.
110

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