Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 85

• Manufacturer Part Number: Z8F1233QH020SG
• Description: IC ENCORE XP MCU FLSH 12K 20QFN
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F1233QH020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Other names: 269-4656

PS025111-1207
6. Configure the associated GPIO port pin for the timer input alternate function.
7. Write to the timer control register to enable the timer and initiate counting.
In CAPTURE mode, the elapsed time between the timer start and the Capture event can be
calculated using the following equation:
Capture Elapsed Time (s)
COMPARE Mode
In COMPARE mode, the timer counts up to 16-bit maximum compare value stored in the
timer reload high and low byte registers. The timer input is the system clock. On reaching
the compare value, the timer generates an interrupt and counting continues (the timer
value is not reset to
timer output pin changes state (from low to high or from high to low) upon compare.
If the timer reaches
Follow the steps below for configuring a timer for COMPARE mode and for initiating the
count:
1. Write to the timer control register to:
2. Write to the timer high and low byte registers to set the starting count value.
3. Write to the timer reload high and low byte registers to set the compare value.
4. Enable the timer interrupt and set the timer interrupt priority by writing to the relevant
5. If using the timer output function, configure the associated GPIO port pin for the timer
6. Write to the timer control register to enable the timer and initiate counting.
In COMPARE mode, the system clock always provides the timer input. The compare time
can be calculated by the following equation:
Compare Mode Time (s)
input capture and Reload events. You can configure the timer interrupt to be generated
only at the input Capture event or the Reload event by setting TICONFIG field of the
TxCTL1 register.
–
–
–
–
interrupt registers.
output alternate function.
Disable the timer
Configure the timer for COMPARE mode.
Set the prescale value.
Set the initial logic level (high or low) for the timer output alternate function.
FFFFH
0001H
). Also, if the timer output alternate function is enabled, the
, the timer resets to
=
=
(
----------------------------------------------------------------------------------------------------
(
------------------------------------------------------------------------------------------------------ -
Compare Value Start Value
Capture Value Start Value
System Clock Frequency (Hz)
System Clock Frequency (Hz)
0000H
–
–
and continues counting.
Z8 Encore!
)
)
Product Specification
×
×
Prescale
Prescale
®
F0830 Series
Timers
75