Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 166

• Manufacturer Part Number: Z8F1233QH020SG
• Description: IC ENCORE XP MCU FLSH 12K 20QFN
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F1233QH020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Other names: 269-4656

Assembly Language Syntax
eZ8 CPU Instruction Notation
PS025111-1207
Table 97. Assembly Language Syntax Example 2
Table 96. Assembly Language Syntax Example 1
Assembly Language Code
Object Code
Assembly Language Code
Object Code
For proper instruction execution, eZ8 CPU assembly language syntax requires that the
operands be written as ‘destination, source’. After assembly, the object code usually has
the operands in the order ‘source, destination’, but ordering is opcode dependent. The
following instruction examples illustrate the format of some basic assembly instructions
and the resulting object code produced by the assembler. This binary format must be
followed by users that prefer manual program coding or intend to implement their own
assembler.
Example 1: If the contents of registers 43H and 08H are added and the result is stored in
43H, the assembly syntax and resulting object code is:
Example 2: In general, when an instruction format requires an 8-bit register address, the
address can specify any register location in the range 0–255 or, using escaped mode
addressing, a working register R0–R15. If the contents of register 43H and working
register R8 are added and the result is stored in 43H, the assembly syntax and resulting
object code is:
See the device specific product specification to determine the exact register file range
available. The register file size varies, depending on the device type.
In the eZ8 CPU instruction summary and description sections, the operands, condition
codes, status flags, and address modes are represented by a notational shorthand that is
described in
Table 98.
ADD
04
ADD
04
43H,
08
43H,
E8
08H
43
R8
43
(ADD dst, src)
(OPC src, dst)
(ADD dst, src)
(OPC src, dst)
Z8 Encore!
Product Specification
eZ8 CPU Instruction Set
®
F0830 Series
156