Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 73

• Manufacturer Part Number: Z8F1233QH020SG
• Description: IC ENCORE XP MCU FLSH 12K 20QFN
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F1233QH020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Other names: 269-4656

Table 44. Interrupt Edge Select Register (IRQES)
Table 45. Shared Interrupt Select Register (IRQSS)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS025111-1207
Interrupt Edge Select Register
Shared Interrupt Select Register
Reserved
IES7
R/W
R/W
0
0
7
7
Reserved—Must be 0.
C3ENL—Port C3 interrupt request enable low bit
C2ENL—Port C2 interrupt request enable low bit
C1ENL—Port C1 interrupt request enable low bit
C0ENL—Port C0 interrupt request enable low bit
The interrupt edge select (IRQES) register determines whether an interrupt is generated
for the rising edge or falling edge on the selected GPIO port A or port D input pin. See
Table
IESx—Interrupt edge select x
0 = An interrupt request is generated on the falling edge of the PAx input or PDx.
1 = An interrupt request is generated on the rising edge of the PAx input or PDx.
where x indicates the specific GPIO port pin number (0 through 7).
The shared interrupt select (IRQSS) register determines the source of the PADxS
interrupts. See
alternate sources for the individual interrupts.
Because these shared interrupts are edge-triggered, it is possible to generate an interrupt
just by switching from one shared source to another. For this reason, an interrupt must be
disabled before switching between sources.
44.
PA6CS
IES6
R/W
R/W
6
0
6
0
Table
45. The shared interrupt select register selects between port A and
IES5
R/W
R/W
5
0
5
0
IES4
R/W
R/W
0
0
4
4
FCDH
FCEH
IES3
R/W
R/W
3
0
3
0
Reserved
IES2
R/W
R/W
Z8 Encore!
0
0
2
2
Product Specification
IES1
R/W
R/W
1
0
1
0
®
Interrupt Controller
F0830 Series
IES0
R/W
R/W
0
0
0
0
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