Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 43

IC ENCORE XP MCU FLSH 12K 20QFN

Z8F1233QH020SG

Manufacturer Part Number
Z8F1233QH020SG
Description
IC ENCORE XP MCU FLSH 12K 20QFN
Manufacturer
Zilog
Series
Encore!®r
Datasheets

Specifications of Z8F1233QH020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4656

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F1233QH020SG
Manufacturer:
Zilog
Quantity:
670
Low-Power Modes
STOP Mode
PS025111-1207
The Z8 Encore!
of power reduction is provided by the STOP mode. The next level of power reduction is
provided by the HALT mode.
Further power savings can be implemented by disabling the individual peripheral blocks
while in NORMAL mode.
You must not enable the pull-up register bits for unused GPIO pins, since these ports are
default output to VSS. Unused GPIOs include those missing on 20-pin packages, as well
as those missing on the ADC-enabled 28-pin packages.
Executing the eZ8 CPU’s STOP instruction places the device into STOP mode. In STOP
mode, the operating characteristics are:
To minimize the current in STOP mode, all GPIO pins that are configured as digital inputs
must be driven to VDD when the pull-up register bit is enabled or to one of power rail
(VDD or GND) when the pull-up register bit is disabled. The device can be brought out of
STOP mode using Stop Mode Recovery. For more information about Stop Mode
Recovery, see
Primary crystal oscillator and Internal Precision Oscillator are stopped; XIN and XOUT
(if previously enabled) are disabled, and PA0/PA1 revert to the states programmed by the
GPIO registers.
System clock is stopped.
eZ8 CPU is stopped.
Program counter (PC) stops incrementing.
Watchdog Timer’s internal RC oscillator continues to operate if enabled by the oscillator
control register.
If enabled, the Watchdog Timer logic continues to operate.
If enabled for operation in STOP mode by the associated Flash option bit, the Voltage
Brownout protection circuit continues to operate.
All other on-chip peripherals are idle.
Reset and Stop Mode Recovery
®
F0830 Series products contain power saving features. The highest level
on page 23.
Z8 Encore!
Product Specification
®
Low-Power Modes
F0830 Series
33

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