Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 39

• Manufacturer Part Number: Z8F1233QH020SG
• Description: IC ENCORE XP MCU FLSH 12K 20QFN
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F1233QH020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Other names: 269-4656

Table 10. Stop Mode Recovery Sources and Resulting Action
PS025111-1207
Operating Mode
STOP mode
Caution:
Stop Mode Recovery using WDT Time-Out
Stop Mode Recovery using GPIO Port Pin Transition
register is set to 1.
The following sections provide more detailed information about each of the Stop Mode
Recovery sources.
If the Watchdog Timer times out during STOP mode, the device undergoes a Stop Mode
Recovery sequence. In the reset status (RSTSTAT) register, the WDT and STOP bits are
set to 1. If the Watchdog Timer is configured to generate an interrupt upon time-out and
the Z8 Encore!
services the WDT interrupt request following the normal Stop Mode Recovery sequence.
Each of the GPIO port pins may be configured as a Stop Mode Recovery input source. If
any GPIO pin is enabled as a Stop Mode Recovery source, a change in the input pin value
(from high to low or from low to high) initiates Stop Mode Recovery. In the reset status
(RSTSTAT) register, the STOP bit is set to 1.
In STOP mode, the GPIO port input data registers (PxIN) are disabled. The port input
data registers record the port transition only if the signal stays on the port pin through
the end of the Stop Mode Recovery delay. As a result, short pulses on the port pin can
initiate Stop Mode Recovery without being written to the port input data register or
without initiating an interrupt (if enabled for that pin).
Stop Mode Recovery Source
Watchdog Timer time-out
when configured for Reset
Watchdog Timer time-out
when configured for interrupt
Data transition on any GPIO port pin
enabled as a Stop Mode Recovery
source
Assertion of external
Debug pin driven Low
®
F0830 Series device is configured to respond to interrupts, the eZ8 CPU
Table 10
lists the Stop Mode Recovery sources and resulting actions.
RESET
Pin
Action
Stop Mode Recovery
Stop Mode Recovery followed by interrupt
(if interrupts are enabled)
Stop Mode Recovery
System reset
System reset
Z8 Encore!
Reset and Stop Mode Recovery
Product Specification
®
F0830 Series
29