Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 138

• Manufacturer Part Number: Z8F1233QH020SG
• Description: IC ENCORE XP MCU FLSH 12K 20QFN
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F1233QH020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Other names: 269-4656

PS025111-1207
Table 87. Write Status Byte
BITS
FIELD
DEFAULT
VALUE
Byte Write
Byte Read
To write a byte to the NVDS array, the user code must first push the address, then the data
byte onto the stack. The user code issues a
Write routine (
working register R0. The bit fields of this status byte are defined in
code should pop the address and data bytes off the stack.
The write routine uses 16 bytes of stack space in addition to the two bytes of address and
data pushed by the user code. Sufficient memory must be available for this stack usage.
Because of the flash memory architecture, NVDS writes exhibit a non-uniform execution
time. In general, a write takes 136 µs (assuming a 20 MHz system clock). For every 200
writes, however, a maintenance operation is necessary. In this rare occurrence, the write
takes up to 58 ms to complete. Slower system clock speeds result in proportionally higher
execution times.
NVDS byte writes to invalid addresses (those exceeding the NVDS array size) have no
effect. Illegal write operations have a 7 µs execution time.
To read a byte from the NVDS array, user code must first push the address onto the stack.
User code issues a
the return from the sub-routine, the read byte resides in working register R0, and the read
7
0
Reserved—Must be 0.
FE—Flash Error
If Flash error is detected, this bit is set to 1.
IGADDR—Illegal address
When NVDS byte writes to invalid addresses (those exceeding the NVDS array size)
occur, this bit is set to 1.
WE—Write Error
A failure occurs during writing data into Flash. When writing data into a certain
address, a read back operation is performed. If the read back value is not the same as
the value written, this bit is set to 1.
6
0
0x20B3
CALL
Reserved
). At the return from the sub-routine, the write status byte resides in
instruction to the address of the byte-read routine (
5
0
4
0
CALL
3
0
instruction to the address of the Byte
FE
Z8 Encore!
2
0
Product Specification
Non-Volatile Data Storage
Table
IGADDR
0
1
®
87. Also, user
F0830 Series
0x2000
WE
0
0
). At
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