ATTINY4313-MU Atmel, ATTINY4313-MU Datasheet - Page 21
![IC MCU AVR 4K FLASH 20QFN](/photos/6/87/68751/313-20-qfn_sml.jpg)
ATTINY4313-MU
Manufacturer Part Number
ATTINY4313-MU
Description
IC MCU AVR 4K FLASH 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY4313-MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Processor Series
ATtiny
Core
AVR
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, USART, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY4313-MU
Manufacturer:
HITTITE
Quantity:
101
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5.4
5.4.1
5.5
5.5.1
8246A–AVR–11/09
I/O Memory
Register Description
General Purpose I/O Registers
EEAR – EEPROM Address Register
The I/O space definition of the ATtiny2313A/4313 is shown in
All ATtiny2313A/4313 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other
AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore be
used on registers containing such status flags. The CBI and SBI instructions work with registers
0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATtiny2313A/4313 contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables and
status flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bit 7 – EEAR7: EEPROM Address
This is the most significant EEPROM address bit of ATtiny4313. In devices with less EEPROM,
i.e. ATtiny2313A, this bit is reserved and will always read zero. The initial value of the EEPROM
Address Register (EEAR) is undefined and a proper value must therefore be written before the
EEPROM is accessed.
• Bits 6..0 – EEAR6..0: EEPROM Address
These are the (low) bits of the EEPROM Address Register. The EEPROM data bytes are
addressed linearly in the range 0...(128/256-1). The initial value of EEAR is undefined and a
proper value must be therefore be written before the EEPROM may be accessed.
Bit
0x1E (0x3E)
Read/Write
Initial Value
EEAR7
R/W
X
7
EEAR6
R/W
X
6
EEAR5
R/W
X
5
EEAR4
R/W
X
4
EEAR3
R/W
X
3
EEAR2
R/W
“Register Summary” on page
X
2
EEAR1
R/W
X
1
EEAR0
R/W
X
0
EEAR
252.
21
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