PIC17LC756A-08/L Microchip Technology, PIC17LC756A-08/L Datasheet - Page 175

• Manufacturer Part Number: PIC17LC756A-08/L
• Description: IC MCU OTP 16KX16 A/D 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756A-08/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.3
For standard mode I
resistors R
ing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices (input current +
The supply voltage limits the minimum value of resistor
R
at V
FIGURE 15-42:
p
leakage current)
2000 Microchip Technology Inc.
due to the specified minimum sink current of 3 mA
OL
Note: I
max = 0.4V for the specified output stages. For
Connection Considerations for
I
2
p
C Bus
also connected.
2
R
C devices with input levels related to V
s
in Figure 15-42 depends on the follow-
2
SAMPLE DEVICE CONFIGURATION FOR I
C bus devices, the values of
SDA
SCL
R
p
R
DD
p
must have one common supply line to which the pull-up resistor is
R
s
V
DD
DEVICE
R
+ 10%
s
example, with a supply voltage of V
V
1.7 k
42. The desired noise margin of 0.1 V
level, limits the maximum value of R
are optional and used to improve ESD susceptibility.
The bus capacitance is the total capacitance of wire,
connections and pins. This capacitance limits the max-
imum value of R
(Figure 15-42).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register and controls the slew rate of
the I/O pins when in I
OL
max = 0.4V at 3 mA, R
V
2
DD
C BUS
as a function of R
p
2
due to the specified rise time
C mode (master or slave).
PIC17C7XX
C
b
= 10 - 400 pF
p
p
min = (5.5-0.4)/0.003 =
is shown in Figure 15-
DD
DS30289B-page 175
s
. Series resistors
= 5V +10% and
DD
for the low