PIC17LC756A-08/L Microchip Technology, PIC17LC756A-08/L Datasheet - Page 49

• Manufacturer Part Number: PIC17LC756A-08/L
• Description: IC MCU OTP 16KX16 A/D 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756A-08/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 7-3:
Bank 2
Bank 3
Bank 4
Bank 5:
Legend:
Note
Address
10h
11h
12h
13h
14h
15h
16h
17h
10h
11h
12h
13h
14h
15h
16h
17h
10h
11h
12h
13h
14h
15h
16h
17h
10h
11h
12h
13h
14h
15h
16h
17h
2000 Microchip Technology Inc.
1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<15:8> whose
2: The TO and PD status bits in CPUSTA are not affected by a MCLR Reset.
3: Bank 8 and associated registers are only implemented on the PIC17C76X devices.
4: This is the value that will be in the port output latch.
5: When the device is configured for Microprocessor or Extended Microcontroller mode, the operation of this port does not rely on these
6: On any device RESET, these pins are configured as inputs.
Unimplemented
TMR1
TMR2
TMR3L
TMR3H
PR1
PR2
PR3L/CA1L
PR3H/CA1H
PW1DCL
PW2DCL
PW1DCH
PW2DCH
CA2L
CA2H
TCON1
TCON2
PIR2
PIE2
RCSTA2
RCREG2
TXSTA2
TXREG2
SPBRG2
DDRF
PORTF
DDRG
PORTG
ADCON0
ADCON1
ADRESL
ADRESH
x = unknown, u = unchanged, - = unimplemented, read as '0', q = value depends on condition.
Shaded cells are unimplemented, read as '0'.
contents are updated from, or transferred to, the upper byte of the program counter.
registers.
Name
(4)
(4)
SPECIAL FUNCTION REGISTERS (CONTINUED)
Timer1’s Period Register
Timer2’s Period Register
Timer3’s Period Register - Low Byte/Capture1 Register; Low Byte
Capture2 High Byte
Serial Port Transmit Register for USART2
Baud Rate Generator for USART2
A/D Result Register High Byte
Timer1’s Register
Timer2’s Register
Timer3’s Register; Low Byte
Timer3’s Register; High Byte
Timer3’s Period Register - High Byte/Capture1 Register; High Byte
Capture2 Low Byte
Serial Port Receive Register for USART2
Data Direction Register for PORTF
Data Direction Register for PORTG
A/D Result Register Low Byte
CA2OVF
TX2/CK2
CA2ED1
ADCS1
SSPIF
SSPIE
CSRC
SPEN
CHS3
AN11
RG7/
Bit 7
RF7/
DC1
DC1
DC9
DC9
—
RX2/DT2
CA2ED0
CA1OVF PWM2ON PWM1ON
ADCS0
BCLIE
BCLIF
CHS2
AN10
RG6/
Bit 6
RF6/
DC0
DC0
DC8
DC8
RX9
TX9
—
TM2PW2
CA1ED1
PWM3
SREN
ADFM
TXEN
CHS1
ADIF
ADIE
RG5/
Bit 5
RF5/
DC7
DC7
AN9
—
—
CA1ED0
CREN
SYNC
CHS0
CAP3
RG4/
Bit 4
RF4/
DC6
DC6
AN8
—
—
—
—
—
—
CA1/PR3
PCFG3
CA4IF
CA4IE
RG3/
Bit 3
RF3/
DC5
DC5
AN7
AN0
T16
—
—
—
—
—
—
GO/DONE
TMR3ON
TMR3CS
PCFG2
CA3IE
CA3IF
FERR
RG2/
Bit 2
RF2/
DC4
DC4
AN6
AN1
—
—
—
—
TMR2ON
TMR2CS
PCFG1
OERR
TX2IF
TX2IE
TRMT
RG1/
Bit 1
RF1/
DC3
DC3
AN5
AN2
—
—
—
—
PIC17C7XX
TMR1ON
TMR1CS
PCFG0
RC2IF
RC2IE
ADON
RX9D
TX9D
RG0/
Bit 0
RF0/
DC2
DC2
AN4
AN3
—
—
—
DS30289B-page 49
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xx-- ---- uu-- ----
xx0- ---- uu0- ----
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0000 0000 0000 0000
0000 0000 0000 0000
000- 0010 000- 0010
000- 0000 000- 0000
---- ---- ---- ----
0000 -00x 0000 -00u
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0000 --1x 0000 --1u
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0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
1111 1111 1111 1111
xxxx 0000 uuuu 0000
0000 -0-0 0000 -0-0
000- 0000 000- 0000
xxxx xxxx uuuu uuuu
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Value on
POR,
BOR
MCLR,
WDT