PIC17LC756A-08/L Microchip Technology, PIC17LC756A-08/L Datasheet - Page 25

• Manufacturer Part Number: PIC17LC756A-08/L
• Description: IC MCU OTP 16KX16 A/D 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756A-08/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

5.1.4
On power-up, the time-out sequence is as follows: First,
the internal POR signal goes high when the POR trip
point is reached. If MCLR is high, then both the OST and
PWRT timers start. In general, the PWRT time-out is
longer, except with low frequency crystals/resonators.
The total time-out also varies based on oscillator config-
uration. Table 5-1 shows the times that are associated
with the oscillator configuration. Figure 5-5 and Figure 5-
6 display these time-out sequences.
TABLE 5-1:
TABLE 5-2:
TABLE 5-3:
Note 1: When BODEN is enabled, else the BOR status bit is unknown.
Power-on Reset
Brown-out Reset
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset during normal operation
WDT Reset during SLEEP
Interrupt Wake-up from SLEEP GLINTD is set
Legend: u = unchanged, x = unknown, - = unimplemented, read as '0'
Note 1: On wake-up, this instruction is executed. The instruction at the appropriate interrupt vector is fetched and
2000 Microchip Technology Inc.
POR
0
1
1
1
1
1
0
0
x
Configuration
2: The OST is only active (on wake-up) when the oscillator is configured for XT or LF modes.
3: The Program Counter = 0; that is, the device branches to the RESET vector and places SFRs in WDT
4: When BODEN is enabled, else the BOR status bit is unknown.
Oscillator
EC, RC
XT, LF
then executed.
Reset states. This is different from the mid-range devices.
TIME-OUT SEQUENCE
BOR
0
1
1
1
1
0
0
0
x
(1)
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS AND THEIR SIGNIFICANCE
RESET CONDITION FOR THE PROGRAM COUNTER AND THE CPUSTA REGISTER
Event
TO
1
1
0
0
1
1
0
x
1
(3)
GLINTD is clear
PD
1
0
1
0
1
1
x
0
1
Greater of: 96 ms or 1024T
Greater of: 96 ms or 1024T
Power-on Reset
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
WDT Reset during normal operation
WDT Wake-up during SLEEP
MCLR Reset during normal operation
Brown-out Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
CLRWDT instruction executed
POR, BOR
PCH:PCL
PC + 1
PC + 1
0000h
0000h
0000h
0000h
0000h
0000h
If the device voltage is not within electrical specification
at the end of a time-out, the MCLR/V
held low until the voltage is within the device specifica-
tion. The use of an external RC delay is sufficient for
many of these applications.
The time-out sequence begins from the first rising edge
of MCLR.
Table 5-3 shows the RESET conditions for some spe-
cial registers, while Table 5-4 shows the initialization
conditions for all the registers.
OSC
OSC
(1)
Event
--11 1100
--11 1110
--11 1111
--11 1011
--11 0111
--11 0011
--11 1011
--10 1011
CPUSTA
Wake-up from
1024T
SLEEP
PIC17C7XX
—
(4)
OSC
DS30289B-page 25
OST Active
PP
MCLR Reset
Yes
Yes
Yes
Yes
Yes
Yes
No
No
pin must be
(2)
(2)
(2)
(2)
—
—