MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 1122

IC MCU 256K FLASH 112-LQFP

MC9S12XA256CAL

Manufacturer Part Number
MC9S12XA256CAL
Description
IC MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12XA256CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
80MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 16 Channel)
Package
112LQFP
Family Name
HCS12
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
The FCTL register is loaded from the Flash Configuration Field byte at global address 0x7F_FF0E during
the reset sequence, indicated by F in
27.3.2.9
The FADDRHI and FADDRLO registers are the Flash address registers.
All FADDRHI and FADDRLO bits are readable but are not writable. After an array write as part of a
command write sequence, the FADDR registers will contain the mapped MCU address written.
27.3.2.10 Flash Data Registers (FDATA)
The FDATAHI and FDATALO registers are the Flash data registers.
1124
NV[7:0]
Reset
Reset
Reset
Field
7-0
W
W
W
R
R
R
Non volatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the Device User Guide for proper
use of the NV bits.
Flash Address Registers (FADDR)
0
0
0
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 27-17. Flash Address Low Register (FADDRLO)
0
Figure 27-16. Flash Address High Register (FADDRHI)
0
0
6
6
6
Figure 27-18. Flash Data High Register (FDATAHI)
Table 27-19. FCTL Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure
0
0
0
5
5
5
27-15.
0
0
0
4
4
4
FADDRLO
FADDRHI
FDATAHI
Description
0
0
0
3
3
3
0
0
0
2
2
2
Freescale Semiconductor
0
0
0
1
1
1
0
0
0
0
0
0

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