MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 324

• Manufacturer Part Number: MC9S12XA256CAL
• Description: IC MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XA256CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XA
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 16 Channel)
• Package: 112LQFP
• Family Name: HCS12
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
7.3.2.8
Read or write: Anytime
All bits reset to zero.
324
7, 5, 3, 1
6, 4, 2, 0
OM[7:0]
OL[7:0]
Reset
Reset
Field
W
W
R
R
OM7
OM3
OMx — Output Mode
OLx — Output Level
These eight pairs of control bits are encoded to specify the output action to be taken as a result of a successful
OCx compare. When either OMx or OLx is one, the pin associated with OCx becomes an output tied to OCx.
See
Timer Control Register 1/Timer Control Register 2 (TCTL1/TCTL2)
0
0
7
7
To enable output action by OMx and OLx bits on timer port, the
corresponding bit in OC7M should be cleared.
Table
7-10.
OMx
OL7
OL3
0
0
6
6
0
0
1
1
Figure 7-11. Timer Control Register 1 (TCTL1)
Figure 7-12. Timer Control Register 2 (TCTL2)
Table 7-9. TCTL1/TCTL2 Field Descriptions
Table 7-10. Compare Result Output Action
MC9S12XDP512 Data Sheet, Rev. 2.21
OM6
OM2
OLx
0
1
0
1
0
0
5
5
Timer disconnected from output pin logic
Toggle OCx output line
Clear OCx output line to zero
Set OCx output line to one
OL6
OL2
NOTE
0
0
4
4
Description
OM5
OM1
Action
0
0
3
3
OL5
OL1
0
0
2
2
Freescale Semiconductor
OM4
OM0
0
0
1
1
OL4
OL0
0
0
0
0