M30280FCHP#U5B Renesas Electronics America, M30280FCHP#U5B Datasheet - Page 128

IC M16C/28 MCU FLASH 128K 80LQFP

M30280FCHP#U5B

Manufacturer Part Number
M30280FCHP#U5B
Description
IC M16C/28 MCU FLASH 128K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280FCHP#U5B

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
1
e
E
Notes:
Table 12.3 Specifications in Event Counter Mode
1. Only timer A3 is selectable. Timer A2 is fixed to normal processing operation, and timer A4 is fixed to
6
. v
J
Count source
Count operation
Divide ratio
Count start condition
Count stop condition
Interrupt request generation timing
TAi
TAi
Read from timer
Write to timer
Select function (Note)
0
C
2
9
multiply-by-4 processing operation.
2 /
0 .
B
IN
OUT
8
0
0
0
G
pin function
4
J
7
o r
a
pin function
0 -
. n
Item
u
2
p
3
0
, 1
0
(
M
2
1
0
(when processing two-phase pulse signal with timers A2, A3 and A4)
6
0
7
C
2 /
, 8
page 106
M
1
1/ (FFFF
1/ (n + 1) for down-count
Timer overflow or underflow
Two-phase pulse input
Two-phase pulse input
Count value can be read by reading timer A2, A3 or A4 register
• When not counting and until the 1st count source is input after counting start
6
• Counter initialization by Z-phase input (timer A3)
• Two-phase pulse signals input to TAi
• Increment or down-count can be selected by two-phase pulse signal
• When the timer overflows or underflows, it reloads the reload register con-
Set TAiS bit in the TABSR register to “1” (start counting)
Set TAiS bit to “0” (stop counting)
• When counting (after 1st count source input)
• Normal processing operation (timer A2 and timer A3)
• Multiply-by-4 processing operation (timer A3 and timer A4)
C
Value written to TAi register is written to reload register
(Transferred to counter when reloaded next)
The timer count value is initialized to 0 by Z-phase input.
tents and continues counting. When operating in free-running mode, the
timer continues counting without reloading.
Value written to TAi register is written to both reload register and counter
The timer counts up rising edges or counts down falling edges on TAj
when input signals on TAj
If the phase relationship is such that TAk
input signal on TAk
edges on TAk
TAk
counts down rising and falling edges on TAk
2 /
f o
TAk
TAj
TAj
8
TAk
3
) B
IN
8
5
(j=2,3)
16
OUT
(k=3,4)
IN
OUT
pin goes “L” when the input signal on TAk
IN
- n + 1) for increment
Increment
OUT
Increment
Increment
and TAk
OUT
all edges
Increment
all edges
pin is “H”, the timer counts up rising and falling
OUT
Specification
n : set value of TAi register
IN
pin is “H”.
pins. If the phase relationship is such that
Increment Decrement
IN
or TAi
Decrement
Decrement
IN
(k=3, 4) pin goes “H” when the
OUT
OUT
Decrement
and TAk
pins (i = 2 to 4)
all edges
OUT
all edges
pin is “H”, the timer
0000
Decrement
IN
pins.
16
to FFFF
IN
12. Timer
pin
16

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