M30280FCHP#U5B Renesas Electronics America, M30280FCHP#U5B Datasheet - Page 224

• Manufacturer Part Number: M30280FCHP#U5B
• Description: IC M16C/28 MCU FLASH 128K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FCHP#U5B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
1
Table 14.16 Registers to Be Used and Settings in Special Mode 2
. v
Figure 14.26 Serial Bus Communication Control Example (UART2)
NOTES:
6
J
Register
U2TB
U2RB
U2BRG
U2MR
U2C0
U2C1
U2SMR
U2SMR2
U2SMR3
U2SMR4
0
C
2
9
2 /
1.Not all bits in the registers are described above. Set those bits to “0” when writing to the registers in Special Mode 2.
0 .
B
0
8
0
0
(1)
(1)
G
(1)
4
J
7
a
o r
0 -
. n
u
2
3
p
0
0 to 7
0 to 7
OER
0 to 7
SMD2 to SMD0
CKDIR
IOPOL
CLK1, CLK0
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS
U2RRM,
U2LCH, U2ERE
0 to 7
0 to 7
CKPH
NODC
0, 2, 4 to 7
0 to 7
, 1
0
(
M
2
0
1
Bit
0
6
7
C
2 /
page 202
, 8
Microcomputer
M
(Master)
1
6
P7
P7
P7
C
1(
2(
0(
2 /
f o
RxD
Set transmission data
Reception data can be read
Overrun error flag
Set a transfer rate
Set to ‘001
Set this bit to “0” for master mode or “1” for slave mode
Set to “0”
Select the count source for the U2BRG register
Invalid because CRD is set" "to 1
Transmit register empty flag
Set to “1”
Select TxD2 pin output format
Clock phases can be set in combination with the CKPH bit in the U2SMR3 register
Select the LSB first or MSB first
Set this bit to “1” to enable transmission
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Select UART2 transmit interrupt cause
Set to “0”
Set to “0”
Set to “0”
Clock phases can be set in combination with the CKPOL bit in the U2C0 register
Set to “0”
Set to “0”
Set to “0”
CLK
TxD
8
P1
P1
3
) B
2
8
2
2
3
2
)
)
)
5
2
’
Function
P9
P7
P7
P9
P7
P7
P7
P7
Microcomputer
Microcomputer
3
0(
0(
2(
1(
3
2(
1(
CLK
TxD
TxD
RxD
CLK
RxD
(Slave)
(Slave)
2
2
2
2
2
2
)
)
)
)
)
)
14. Serial I/O