DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 572

IC H8S/2268 MCU FLASH 100QFP

DF2268FA13V

Manufacturer Part Number
DF2268FA13V
Description
IC H8S/2268 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2268FA13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2268FA13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 20 ROM
Table 20.4 Boot Mode Operation
Table 20.5 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate Is
Rev. 5.00 Sep. 01, 2009 Page 520 of 656
REJ09B0071-0500
Host Bit Rate
19,200 bps
9,600 bps
4,800 bps
Item
Boot mode
start
Bit rate
adjustment
Transfer of
programming
control
program
Flash memory
erase
Execution of
programming
control program
Host Operation
Processing Contents
Transmits data H'55 when data H'00
is received error-free.
Transmits number of bytes (N) of
programming control program to be
transferred as 2-byte data (low-order
byte following high-order byte)
Continuously transmits data H'00 at
specified bit rate.
Receives data H'AA.
Transmits 1-byte of programming
control program (repeated for
N times)
Receives data H'AA.
Possible
Boot program
System Clock Frequency Range of this LSI
8 to 20.5 MHz
4 to 20.5 MHz
2 to 20.5 MHz
erase error
Communications Contents
H'00, H'00 ...... H'00
High-order byte and
low-order byte
Echoback
Echoback
H'AA
H'XX
H'00
H'55
H'FF
H'AA
LSI Operation
Processing Contents
Branches to boot program at reset-start.
· Measures low-level period of receive data
· Calculates bit rate and sets it in BRR of
· Transmits data H'00 to host as adjustment
H'00.
SCI_0.
end indication.
Transmits data H'AA to host when data
Echobacks the 2-byte data received.
Echobacks received data to host and also
transfers it to RAM (repeated for N times)
Checks flash memory data, erases all
flash memory blocks in case of written
data existing, and transmits data H'AA to
host. (If erase could not be done,
transmits data H'FF to host and aborts
operation.)
Branches to programming control program
transferred to on-chip RAM and starts
execution.
H'55 is received.
Boot program initiation

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