DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 579

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.8.2
When erasing flash memory, the erase/erase-verify flowchart shown in figure 20.11 should be
followed.
1. Prewriting (setting erase block data to all 0) is not necessary.
2. Erasing is performed in block units. Make only a single-bit specification in the erase block
3. The time during which the E1 bit is set to 1 is the flash memory erase time.
4. The watchdog timer (WDT) is set to prevent overprogramming due to program runaway, etc.
5. For a dummy write to a verify address, write 1-byte data H'FF to an address whose lower 1 bit
6. If the read data is not erased successfully, set erase mode again, and repeat the erase/erase-
20.8.3
All interrupts, including the NMI interrupt, are disabled while flash memory is being programmed
or erased, or while the boot program is executing, for the following three reasons:
1. Interrupt during programming/erasing may cause a violation of the programming or erasing
2. If interrupt exception handling starts before the vector address is written or during
3. If an interrupt occurs during boot program execution, normal boot mode sequence cannot be
register 1 and 2 (EBR1 and EBR2). To erase multiple blocks, each block must be erased in
turn.
Set a value greater than (t
is B'0. Verify data can be read in words from the address to which a dummy write was
performed.
verify sequence as before. The maximum number of repetitions of the erase/erase-verify
sequence is (N).
algorithm, with the result that normal operation cannot be assured.
programming/erasing, a correct vector cannot be fetched and the CPU malfunctions.
carried out.
Erase/Erase-Verify
Interrupt Handling when Programming/Erasing Flash Memory
sesu
+ t
se
+ t
ce
+ t
cesu
) ms as the WDT overflow period.
Rev. 5.00 Sep. 01, 2009 Page 527 of 656
REJ09B0071-0500
Section 20 ROM