HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 439

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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BRER:
;———< Block address table used in erase-verify> ———
ERVADR:
EOWARI:
ABEND2:
Loop Counter Values in Programs and Watchdog Timer Overflow Interval Settings:
The setting of #a, #b, #c, #d, and #e values in the programs depends on the clock frequency.
Tables 19.9 (1) and (2) indicate sample loop counter settings for typical clock frequencies.
However, #e is set according to table 19.10.
As a software loop is used, calculated values including percent errors may not be the same as
actual values. Therefore, the values are set so that the total programming time and total erase time
do not exceed 1 ms and 30 s, respectively.
The maximum number of writes in the program, N, is set to 50.
Programming and erasing in accordance with the flowcharts is achieved by setting #a, #b, #c, and
#d in the programs as shown in tables 19.9 (1) and (2). #e should be set as shown in table 19.10.
Wait state insertion is inhibited in these programs. If wait states are to be used, the setting should
be made after the program ends. The setting value for the watchdog timer (WDT) overflow time is
calculated based on the number of instructions between starting and stopping of the WDT,
including the write time and erase time. Therefore, no other instructions should be added between
starting and stopping of the WDT in this program example.
MOV.W
CMP.W
BNE
BRA
.ALIGN
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
Erase end
Erase error
#H'0BB8,
R4,
ERASE1
ABEND2
2
H'0000
H'0080
H'0100
H'0180
H'0200
H'0400
H'0800
H'0C00
H'1000
H'2000
H'4000
H'6000
H'8000
R4
R6
;
; Erase-verify executed 3000 times?
; If erase-verify not executed 3000 times, erase again
; If erase-verify executed 3000 times, branch to ABEND2
; SB0
; SB1
; SB2
; SB3
; SB4
; SB5
; SB6
; SB7
; LB0
; LB1
; LB2
; LB3
; FLASH END
407

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